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PDF ADL5502 Data sheet ( Hoja de datos )
| Número de pieza | ADL5502 | |
| Descripción | 800 MHz to 3800 MHz Crest Factor Detector | |
| Fabricantes | Analog Devices | |
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Preliminary Technical Data
FEATURES
True rms response detector
Envelope output with peak hold option
Excellent temperature stability
±0.25 dB rms detection accuracy vs. temperature
±0.25 dB envelope detection accuracy vs. temperature;
over the top 15 dB of the input range
www.DataSheeOt4vUe.rco3m0 dB input power dynamic range, inclusive of crest
factor, up to 3.8 GHz
RF bandwidths from 800 MHz to 3.8 GHz
Envelope bandwidths of 10 MHz
500 Ω input impedance
Single-supply operation: 2.7 V to 3.5 V
Low power: 5 mA at 3 V supply
RoHS compliant
APPLICATIONS
Power and envelope measurement of W-CDMA, CDMA2000,
and QPSK-/QAM-based OFDM, and other complex
modulation waveforms
RF transmitter or receiver power and envelope measurement
GENERAL DESCRIPTION
The ADL5502 is a mean-responding power detector in
combination with an envelope detector to accurately determine
the crest factor of a modulated signal. It can be used in high
frequency receiver and transmitter signal chains from 800 MHz
to 3.8 GHz with envelope bandwidths over 10 MHz. Requiring
only a single supply between 2.7 V and 3.5 V, the detector draws
less than 5 mA. The input is internally ac-coupled and has a
nominal input impedance of 500 Ω.
The rms output is a linear-responding dc voltage with a
conversion gain of 2.0 V/Vrms at 900 MHz. The envelope
output with a conversion gain of 1.4 V/V can be toggled
between real-time envelope measurement or peak hold with less
than TBD mV droop in over 200 μS.
800 MHz to 3800 MHz
Crest Factor Detector
ADL5502
Figure 1.
The ADL5502 is a highly accurate, easy to use means of
determining the peak to average value of complex waveforms.
It can be used for crest factor measurements of both simple and
complex waveforms, but is particularly useful for measuring
high crest factor (high peak-to-rms ratio) signals, such as
CDMA2000, W-CDMA, and QPSK/QAM-based OFDM
waveforms. The peak hold function allows the capture of short
peaks in the envelope with lower sampling rate ADC’s.
The crest factor detector operates from −40°C to +85°C and is
available in an 8-ball, 1.5 mm × 1.5 mm wafer-level chip scale
package. It is fabricated on a high fT silicon BiCMOS process.
Rev. PrD (04/20/2008)
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.
1 page  
PRELIMINARY TECHNICAL DATA
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Supply Voltage VS
VRMS, VPK/ENV, ENBL, PK/ENV
RFIN
Equivalent Power, re 50 Ω
Internal Power Dissipation
θJA (SC-70)
Maximum Junction Temperature
www.DataSheeOt4pUe.rcaotming Temperature Range
Storage Temperature Range
Rating
3.5 V
0 V, VS
1.25 V rms
15 dBm
TBD mW
TBD°C/W
125°C
−40°C to +85°C
−65°C to +150°C
ADL5502
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. PrD (04/20/2008) | Page 5 of 14
5 Page 
PRELIMINARY TECHNICAL DATA
ADL5502
www.DataSheet4U.com
Figure 18. Evaluation Board Schematic
Figure 19. Layout of Evaluation Board, Component Side
Figure 20. Layout of Evaluation Board, Circuit Side
Rev. PrD (04/20/2008) | Page 11 of 14
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet ADL5502.PDF ] | |
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