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Teilenummer | DG2016 |
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Beschreibung | Dual SPDT Analog Switch | |
Hersteller | Vishay Siliconix | |
Logo | ||
Gesamt 6 Seiten New Product
DG2016
Vishay Siliconix
High-Bandwidth, Low Voltage, Dual SPDT Analog Switch
FEATURES
D Single Supply (1.8 V to 5.5 V)
D Low On-Resistance - rON: 2.4 W
D Crosstalk and Off Isolation: -81 dB @
www.DataSheet4U1.cMomHz
D MSOP-10 Package
BENEFITS
D Reduced Power Consumption
D High Accuracy
D Reduce Board Space
D Low-Voltage Logic Compatible
D High Bandwidth
APPLICATIONS
D Cellular Phones
D Speaker Headset Switching
D Audio and Video Signal Routing
D PCMCIA Cards
D Low-Voltage Data Acquisition
D ATE
DESCRIPTION
The DG2016 is a monolithic CMOS dual
single-pole/double-throw (SPDT) analog switch. It is
specifically designed for low-voltage, high bandwidth
applications.
The DG2016’s on-resistance (3 W @ 2.7 V), matching and
flatness are guaranteed over the entire analog voltage range.
Wide dynamic performance is achieved with better than
–80 dB for both cross-talk and off-isolation at 1 MHz.
Both SPDT’s operate with independent control logic, conduct
equally well in both directions and block signals up to the
power supply level when off. Break-before-make is
guaranteed.
With fast switching speeds, low on-resistance, high
bandwidth, and low charge injection, the DG2016 is ideally
suited for audio and video switching with high linearity.
Built on Vishay Siliconix’s low voltage CMOS technology, the
DG2016 contains an epitaxial layer which prevents latch-up.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
IN1
NO1
GND
NO2
IN2
1
2
3
4
5
MSOP-10
Top View
10 COM1
9 NC1
8 V+
7 NC2
6 COM2
Logic
0
1
TRUTH TABLE
NC1 and NC2 NO1 and NO2
ON
OFF
OFF
ON
ORDERING INFORMATION
Temp Range
-40 to 85°C
Package
MSOP-10
Part Number
DG2016DQ
Document Number: 72030
S-22312—Rev. A, 20-Jan-03
www.vishay.com
1
DG2016
Vishay Siliconix
TEST CIRCUITS
V+
V+
VNO
NO
COM
VNC
NC
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IN
GND
New Product
RL
50 W
VO
CL
35 pF
Logic VINH
Input
VINL
VNC = VNO
VO
Switch 0 V
Output
CL (includes fixture and stray capacitance)
FIGURE 5. Break-Before-Make Interval
90%
tD
tr <5 ns
tf <5 ns
tD
V+
Vgen
Rgen
+
VIN = 0 - V+
V+
NC or NO
IN
GND
COM
VOUT
CL = 1 nF
VOUT
IN
On
DVOUT
Off
On
Q = DVOUT x CL
FIGURE 2. Charge Injection
IN depends on switch configuration: input polarity
determined by sense of switch.
10 nF
V+
V+
NC or NO
COM COM
IN
RL GND
Analyzer
VCOM
Off Isolation + 20 log VNOńNC
FIGURE 3. Off-Isolation
www.vishay.com
6
10 nF
V+
0V, 2.4 V
0 V, 2.4 V
V+
COM
IN
NC or NO
GND
Meter
HP4192A
Impedance
Analyzer
or Equivalent
f = 1 MHz
FIGURE 4. Channel Off/On Capacitance
Document Number: 72030
S-22312—Rev. A, 20-Jan-03
6 Page | ||
Seiten | Gesamt 6 Seiten | |
PDF Download | [ DG2016 Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
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