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PDF ADN2873 Data sheet ( Hoja de datos )
| Número de pieza | ADN2873 | |
| Descripción | Laser Diode Driver | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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3.3 V, 50 Mbps to 4.25 Gbps,
Single-Loop, Laser Diode Driver
ADN2873
FEATURES
SFP/SFF and SFF-8472 MSA compliant
SFP reference design available
50 Mbps to 4.25 Gbps operation
Automatic average power control
Typical 60 ps output rise/fall time
VCSEL, DFB, and FP laser support
www.DataSheeBt4iaUs.ccoumrrent range: from 2 mA to 100 mA
Modulation current range: from 5 mA to 90 mA
Laser fail alarm and automatic laser shutdown (ALS)
Bias and modulation current monitoring
Voltage setpoint control
Resistor setpoint control
3.3 V supply
24-lead 4 mm × 4 mm LFCSP
Pin compatible with ADN2870
APPLICATIONS
1×/2×/4× Fibre Channel SFP/SFF modules
Multirate OC3 to OC48-FEC SFP/SFF modules
LX-4 modules
DWDM/CWDM laser transmitters
HDTV (SMPTE family) laser transmitters
GENERAL DESCRIPTION
Like the ADN2870, the ADN2873 laser diode driver (LDD) is
designed for advanced SFP and SFF modules, using SFF-8472
digital diagnostics. The ADN2873 supports NRZ data
transmission operation from 50 Mbps up to 4.25 Gbps. With a
new alarm scheme, this device avoids the shutdown issue
caused by the system transient generated from various lasers.
The ADN2873 monitors the laser bias and modulation currents
and it provides fail alarms and ALS. Using setup voltages of a
microcontroller DAC or a trimmable resistor voltage divider,
the ADN2873 can set up a laser optical average output power and
extinction ratio. The optical average power control loop consists
of an optical feedback from a photodiode, the comparator, and a
status holder. The ADN2873 works easily with the Analog
Devices, Inc., ADuC7019/ADuC702x family of MicroConverter®
devices and with the ADN289x family of limiting amplifiers to
make a complete SFP/SFF transceiver chipset solution.
The ADN2873 is pin compatible with the ADN2870 dual-loop
LDD, allowing the same design to work with either device. For
dual-loop control applications, refer to the ADN2870 data sheet.
The product is available in a space-saving 24-lead, 4 mm × 4 mm
LFCSP specified over the −40°C to +85°C temperature range.
Figure 1 shows an application diagram of the voltage setpoint
control with single-ended laser interface. Figure 36 shows a
differential laser interface.
Tx_DISABLE
Tx_FAULT
ANALOG DEVICES
MICROCONTROLLER
DAC
ADC
DAC
APPLICATIONS DIAGRAM
VCC
VCC
VCC
MPD
PAVSET
PAVREF
RPAV
1kΩ
GND ERREF
ERSET
1kΩ
GND
FAIL
ALS
IMODN
CONTROL
100Ω
×100
IMOD
ADN2873
VCC GND
IBMON
1kΩ
IMMON PAVCAP
470Ω GND
GND
Figure 1.
GND
NC
VCC
L
R
VCC
LASER
IMODP
DATAP
IBIAS
DATAN
VCC
RZ
CCBIAS
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.
1 page  
ADN2873
SFP TIMING SPECIFICATIONS
Table 2.
Parameter
Symbol Min Typ Max Unit Conditions/Comments
ALS Assert Time
t_off 1 5 μs Time for the rising edge of ALS (Tx_DISABLE) to when
the bias current falls below 10% of nominal
ALS Negate Time1
t_on 0.15 0.4 ms Time for the falling edge of ALS to when the modulation
current rises above 90% of nominal
Time to Initialize, Including Reset of FAIL1 t_init
25 275 ms From power-on or negation of FAIL using ALS
FAIL Assert Time
t_fault
100 μs Time to fault to FAIL on
ALS to Reset Time
t_reset
5 μs Time Tx_DISABLE must be held high to reset Tx_FAULT
1 Guaranteed by design and characterization. Not production tested.
www.DataSheet4U.com
DATAP
DATAN
VSE
DATAP – DATAN
0V
V p-p DIFF = 2 × VSE
Figure 4. Signal Level Definition
SFP MODULE
VCC_Tx
1µH
0.1µF
0.1µF
3.3V
10µF
SFP HOST BOARD
Figure 5. Recommended SFP Supply
Rev. 0 | Page 5 of 20
5 Page 
FAIL ASSERTED
FAULT FORCED ON PAVSET
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Figure 21. FAIL Assert Time,1 μs/DIV
ADN2873
TRANSMISSION ON
POWER SUPPLY TURNED ON
Figure 22. Time to Initialize, Including Reset, 40 ms/DIV
Rev. 0 | Page 11 of 20
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet ADN2873.PDF ] | |
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