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PDF ADN2849 Data sheet ( Hoja de datos )
| Número de pieza | ADN2849 | |
| Descripción | 10.7 Gbps Electro-Absorption Modulator Driver | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ADN2849 (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
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10.7 Gbps Electro-Absorption Modulator Driver
Preliminary Technical Data
ADN2849
FEATURES
Data Rates up to 10.709Gb/s
Typical Rise/Fall Time 27ps
Power Dissipation 900mW (at 2V swing, 1V offset)
Programmable Modulation Voltage up to 3V
Programmable Bias Offset Voltage up to 2V
Voltage-input control for offset, modulation
www.DataSheeCt4rUos.csoPmoint Adjust Range 30%- 85%
Selectable Data Retiming
PECL/CML Data & Clock Inputs
50Ω on Chip Data & Clock Terminations
Modulation Ebnable/Disable
|S11|<-10dB , |S22|<-8dB at 10GHz
Positive or negative 5.2 or 5.0V single supply operation
Available in dice and 4x4mm 24 Lead LFCSP package
PRODUCT DESCRIPTION
The ADN2849 is a low power 10.7Gbps driver for electro-
absorption modulator (EAM) applications. The modulation
voltage is programmable via an external voltage up to a
maximum swing of 3V when driving 50Ω. The bias offset
voltage and output eye cross point are also programmable. On-
chip 50Ω resistor is provided for back termination of the
output. The ADN2849 is driven by AC coupled differential
CML level data and has selectable data retiming to remove jitter
from data input signal. The modulation voltage can be enabled
or disabled by driving the MOD_ENB pin with the proper logic
levels. It can operate with positive or negative (5.2V or 5.0V)
supply voltage.
The ADN284949 is available in a compact 4x4mm plastic
package or dice format.
APPLICATIONS
SONET OC-192 Optical Transmitters
SDH STM-64 Optical Transmitters
10Gb Ethernet IEEE802.3
XFP/X2/XENPACK/MSA-300 Optical Modules
ADN2849
CPAP CPAN MOD_SET
BIAS_SET GND VTERM MODN_TERM
GND
R
R
DATAP
DATAN
VBB
CLKP
CLKN
50Ω
50Ω
50Ω
50Ω
DQ
MUX
CROSS
POINT
ADJUST
50Ω
MODP
VEE
VEE CLK_SELB MOD_ENB
Figure 1. Functional Block Diagram
Rev. Pr. G August 2004
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
1 page  
Preliminary Technical Data
ADN2849
TYPICAL PERFORMANCE CHARACTERISTICS (TA=250C, VEE=-5.2V)
000 000
000 000
000
TBD
000
000
TBD
000
000
www.DataSheet4U.com
000
00 0
000 000 000 000
ALL CAPS (Initial cap)
Figure 4. Rise time vs. Swing
000
000
000
00 0
000 000 000 000
ALL CAPS (Initial cap)
Figure 7. Total jitter vs. Swing
000
000 000
000 000
000
TBD
000
000
TBD
000
000 000
000
00 0
000 000 000 000
ALL CAPS (Initial cap)
Figure 5. Fall time vs. Swing
000
000
000
000
TBD
000
000
000
00 0
000 000 000 000
ALL CAPS (Initial cap)
Figure 6. Random jitter vs. Swing
000
000
00 0
000 000 000 000
ALL CAPS (Initial cap)
000
Figure 8. Cross point vs. differential voltage at CPAP/CPAN pins
000
000
000
TBD
000
000
000
00 0
000 000 000 000
ALL CAPS (Initial cap)
Figure 9. Differential S11 vs. frequency
000
Rev. Pr. G | Page 5 of 17
5 Page 
Preliminary Technical Data
The single-ended voltage at CPAP and CPAN pins must be
within the –0.8V to-1.85V range for proper operation of the
cross point adjust block. The cross point will be controlled by
the differential voltage obtained from the single-ended voltages
applied to CPAP and CPAN pins. A simple implementation of a
cross point adjust circuit is shown in figure 23 where a 20KΩ
potentiometer generates the required differential voltage within
the specified input voltage range.
GND
www.DataSheet4U.com
CP AP
20kΩ
CPAN
Cross
Point
Adjust
100uA
100uA
VEE
VE E
Figure 23. Cross point adjust control circuit
An alternative implementation is to use a voltage DAC and a
single-ended to differential conversion amplifier such as the
AD138 that will allow digital control of the cross point. When
designing the circuitry that will drive the voltages at the CPAP
and CPAN pins the user should take in account that each pin is
sinking 100µΑ. If the cross point adjust feature is not required
both the CPAP and CPAN pins should be connected to GND.
This will automatically set the cross point to 50%. Once the
cross point adjust has been calibrated under nominal conditions
it has very low drift over temperature and supply voltage
variations.
MODULATION ENABLE
The modulation voltage generated by the ADN2849 can be
enabled or disabled under the control of the MOD_ENB pin.
When the modulation is disabled, the input data is ignored and
the voltage at the output of the ADN2849 will place the EA
modulator in a high absorption (low transparency) state. The
relationship between the logic state of the MOD_ENB input and
the modulation voltage is described in table 8.
Table 8.
MOD_ENB logic level
Low
High
Modulation voltage
Enabled
Disabled
ADN2849
The MOD_ENB pin is a 5V TTL and CMOS compatible logic
input. Its equivalent circuit of the MOD_ENB pin is shown in
figure 24.
GND
MOD_ENB
GND
180K
40K
GND
60K
VEE
VEE
Figure 24. Equivalent circuit of the MOD_ENB pin
OUTPUT STAGE
The output stage of the ADN2849 can provide up to 2V bias
offset and up to 3V modulation voltage across a single-ended
50Ω load. Both the bias offset and the modulation voltage are
made available at a single pin (MODN) eliminating the need for
external bias inductors as shown in figure 25.
GND
VMOD_SET
+
-
VBIAS_SET
+
-
100nF
ADN2849
GND
R
R
From cross
point adjust
block
50Ω
IMOD
MODP
VEE
Figure 25. Output stage of the ADN2849
50Ω
EAM
Rev. Pr. G | Page 11 of 17
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet ADN2849.PDF ] | |
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