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PDF PLL103-01 Data sheet ( Hoja de datos )
| Número de pieza | PLL103-01 | |
| Descripción | Low Skew Buffer | |
| Fabricantes | PhaseLink Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de PLL103-01 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
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FEATURES
• Generate 18 copies of High-speed clock inputs.
• Supports up to four SDRAM DIMMS synchronous
clocks.
• Supports 2-wire I2C serial bus interface with
readback.
• 50% duty cycle with low jitter.
• Less than 5ns delay.
www.DataShe•et4U.Scokmew between any outputs is less than 250 ps.
• Tri-state pin for testing.
• Frequency up to 133 MHZ.
• 3.0V-3.7V Supply range.
• 48-pin SSOP package.
BLOCK DIAGRAM
SDATA
SCLK
I2C
Control
BUF_IN
OE
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
SDRAM6
SDRAM7
SDRAM8
SDRAM9
SDRAM10
SDRAM11
SDRAM12
SDRAM13
SDRAM14
SDRAM15
SDRAM16
SDRAM17
PLL103-01
Low Skew Buffers
PIN CONFIGURATION
N/C
N/C
VDD
SDRAM0
SDRAM1
GND
VDD
SDRAM2
SDRAM3
GND
BUF_IN
VDD
SDRAM4
SDRAM5
GND
VDD
SDRAM6
SDRAM7
GND
VDD
SDRAM16
GND
VDD1
SDATA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Note: ^: pull up
48 N/C
47 N/C
46 VDD
45 SDRAM15
44 SDRAM14
43 GND
42 VDD
41 SDRAM13
40 SDRAM12
39 GND
38 OE^
37 VDD
36 SDRAM11
35 SDRAM10
34 GND
33 VDD
32 SDRAM9
31 SDRAM8
30 GND
29 VDD
28 SDRAM17
27 GND
26 GND1
25 SCLK
POWER GROUP
• VDD: SDRAM( 0:17 )
• VDD1: I2C Circuitry
GROUND GROUP
• GND: SDRAM( 0:17 )
• GND1: I2C Circuitry
KEY SPECIFICATIONS
• BUFIN to SDRAM outputs Delay: 1 ~ 5 ns.
• Output Slew: ≥1.5 V/ns.
• Output Skew: ±250 ps.
• Output Duty Cycle: 50% ± 5%.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 03/08/00 Page 1
1 page  
PLL103-01
Low Skew Buffers
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
Input Voltage, dc
www.DataSheOetu4tUp.uctoVmoltage, dc
Storage Temperature
Ambient Operating Temperature
VDD VSS-0.5 7.0
V
VI
VSS-0.5
VDD+0.5
V
VO
VSS-0.5
VDD+0.5
V
TS -65 150 °C
TA 0 70 °C
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
2. AC/DC Electrical Specifications
PARAMETERS
Input High Current
Input Low Current
Input High Voltage
Input Low Voltage
Input Frequency
Input Capacitance
Operating Supply
Current
SYMBOL
CONDITIONS
IIH VIN = VDD
IIL VIN=0V; with no pull-up resistors
IIL VIN=0V; with 100k pull-up resistors
VIH
VIL
FIN VDD=3.3V; All outputs loaded
CIN Logic Inputs
IDD1 CL= 0pf @ 66MHz
IDD2 CL= 0pf @ 100MHz
IDD3 CL= 30pf; RS= 33Ω @ 66MHz
IDD4 CL= 30pf; RS= 33Ω @ 100MHz
IDD5 Stopped, input at 0 or VDD
MIN.
2
VSS−0.3
10
TYP.
80
120
180
240
MAX.
5
VDD+0.3
0.8
150
5
120
180
260
360
500
UNITS
uA
uA
uA
V
V
Mhz
PF
mA
mA
mA
mA
uA
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 03/08/00 Page 5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet PLL103-01.PDF ] | |
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