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DS1482 Schematic ( PDF Datasheet ) - Dallas Semiconductor

Teilenummer DS1482
Beschreibung 1-Wire Level Shifter and Line Driver
Hersteller Dallas Semiconductor
Logo Dallas Semiconductor Logo 




Gesamt 7 Seiten
DS1482 Datasheet, Funktion
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FEATURES
§ Works with All iButtons® and 1-Wire®
Devices
§ Communicates at Regular and Overdrive 1-
Wire Speed (Host-Dependent)
§ Separate Interface Power Supply to Level
Shift to Non-5V Systems
§ External Strong-Pullup Control Pin can be
Used to Provide Low-On-Resistance-High
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§ Load Sensor to Detect when Strong-Pullup
Power Delivery is no Longer Needed
§ Power Delivery DONE Signal can be
Connected to Host Interrupt
§ Low-Cost 16-Pin SO Surface-Mount Package
§ Operating Temperature Range: -40°C to
+85°C
DS1482
1-Wire Level Shifter and Line Driver
with Load Sensor
PIN ASSIGNMENT
1VCCQ
N.C. 2
SPU 3
START 4
TXD 5
N.C. 6
GND 7
N.C. 8
16 VCC
15 N.C.
14 PCTLZ
13 DONE
12 RXD
11 N.C.
10 I/O
9 N.C.
ORDERING INFORMATION
DS1482S
SO-16
DS1482S/T&R
SO-16, Tape-and-Reel
Contact the factory for versions with different
signal polarities.
DESCRIPTION
The DS1482 is a simple 1-Wire line driver with load sensor and level shifter, designed to function as an
interface between a 3V host system and a 1-Wire system that runs on 5V. Two supplies are provided, a
5V supply for the 1-Wire operations (VCC) and an interface supply (VCCQ). The DS1482 can connect
directly to a synchronous serial port if it supports the appropriate bit rates to generate 1-Wire timing.
Figure 1 shows the DS1482 block diagram. TXD is buffered and controls an N-channel transistor, which
drives the 1-Wire pin I/O low, e.g., to initiate a time slot. The logic level of the I/O pin is returned
through a level-shifting buffer to the RXD pin for the host processor to read. Figure 3 shows the
relationship of these signals in case of a 1-Wire read time slot.
The SPU input generates a control signal (PCTLZ) for an external low-impedance PMOS transistor
(Figure 2) that bypasses the 1-Wire pullup resistor (RPUP) to provide power for 1-Wire devices with a
high-load current. PCTLZ is gated by the inverted TXD signal. This prevents a high through-current in
case TXD and SPU are high at the same time.
The DS1482 contains a high-precision comparator because it is important for the host micro to know
when the high load on the 1-Wire side is no longer active. As shown in Figure 4, the high current load
causes a small drop of the voltage on the I/O pin. The comparator detects when the high current phase
ends, and enables DONE after the deglitching time tCF is over. The START signal allows the host micro
to selectively enable DONE.
iButton and 1-Wire are registered trademarks of Dallas Semiconductor.
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DS1482 Datasheet, Funktion
ABSOLUTE MAXIMUM RATINGS*
Voltage to GND (All Pins)
-0.5V, +6.0V
Combined Source/Sink Current (All Pins)
20mA
Operating Temperature Range
-40°C to +85°C
Junction Temperature
+150°C
Storage Temperature Range
-55°C to +125°C
Lead Temperature (Soldering)
See IPC/JEDEC 020A
ESD requirements are 15kV for the I/O pin and 4kV for all other pins.
DS1482
* This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operation sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods of time may affect reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 4.5V to 5.5V, VCCQ = 3.0V to 3.6V; TA = -40°C to +85°C.)
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Supply Current
SYMBOL
ICC
CONDITIONS
MIN
TYP
Supply Current
ICCQ
Supply Ramp-up
VCC, VCCQ rising from 0
Time (System
tRCC
to VCCMIN and VCCQMIN,
0.1
Requirement)
respectively
1-Wire Pullup
Resistor
RPUP
850
INPUT PINS SPU, START, TXD
Input High Voltage
Input Low Voltage
VIH 0.7 x VCCQ
VIL
Measured with either 0V
Input Leakage
ILP or VCCQ on the pin
(Note 1)
Delay TXD to I/O
tTI
No DC load on I/O; see
Figure 5 (Note 2)
I/O PIN (1-WIRE)
Output Low Voltage
VOL 100mA load
Output High Voltage
Pin Leakage Current
Input High Voltage
Input Low Voltage
Comparator
Reference Voltage
VOH
ILP
VIH
VIL
VREF
No DC load
(Note 3)
-1
0.7 x VCC
VCC
0.99 x VCC
0.995 x
VCC
Output Fall Time
(50pF Load)
tFIO 0.9 x VCC to 0.1 x VCC
45
MAX
150
100
UNITS
µA
µA
µs
1650
W
0.2 x VCCQ
3
V
V
µA
100 ns
0.4
+1
0.2 x VCC
0.998 x
VCC
150
V
V
µA
V
V
V
ns
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