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PDF AAT1161 Data sheet ( Hoja de datos )

Número de pieza AAT1161
Descripción 3A Step-Down Converter
Fabricantes Advanced Analogic Technologies 
Logotipo Advanced Analogic Technologies Logotipo



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SwitchRegTM
PRODUCT DATASHEET
AAT1161
13.2V Input, 3A Step-Down Converter
General Description
The AAT1161 is an 800kHz high efficiency step down
DC-DC converter with wide input voltage range. With
4.0V to 13.2V input rating, the AAT1161 is the perfect
choice for 2-cell Li+ battery powered devices and mid
power range regulated 12V powered applications. The
internal power switch is capable of delivering up to 3A
load current.
The AAT1161 is a highly integrated device in order to
www.DatasSihmeeptl4iUfy.cosmystem level design for the users. It is a non-
synchronous converter that is used with an external
Schottky diode rectifier for low-cost applications.
Minimum external components are required for the con-
verter. All the control circuits are integrated in the IC.
The AAT1161 optimizes efficiency throughout the entire
load range. It operates in a combination PWM/Light Load
mode for improved light-load efficiency. It can also oper-
ate in a forced Pulse Width Modulation (PWM) mode for
easy control of the switching noise as well as faster tran-
sient response. The high switching frequency allows the
use of small external components. The low current shut-
down feature disconnects the load from VIN and drops
shutdown current to less than 1μA.
The AAT1161 is available in a Pb-free, space-saving,
thermally-enhanced 14-pin TDFN33 package and is rated
over an operating temperature range of -40°C to +85°C.
Features
Input Voltage Range : 4.0V to 13.2V
Up to 3A Load Current
Fixed or Adjustable Output:
Output Voltage: 0.6V to VIN
Less than 1μA Shutdown Current
Up to 95% Efficiency
Integrated High-Side Power Switch
External Schottky Rectifier
800kHz Switching Frequency
Soft Start Function
Short-Circuit and Over-Temperature Protection
Minimum External Components
Tiny 14-pin 3x3mm TDFN Package
Temperature Range: -40°C to +85°C
Applications
Digital Camcorders
Industrial Applications
Portable DVD Players
Rack Mounted Systems
Set Top Boxes
Typical Application
VIN 4.5V- 13.2V
C6
10µF
R4
10
C8
1µF
C2
0.1µF
6 EN
10
IN
11
IN
13
AIN
LX 8
LX 9
AAT1161 FB 1
PGND 12
4, 5
DGND
COMP 2
7 N/C
PGND
AGND 3
14
LDO
EP1
C9
1µF
L1
3.8µH
C1
D1 100pF
R5
51k
VOUT
5V, 3A
R3
432 k
C3, 4, 5
66µF
R6
59k
C7
150pF
1161.2008.03.1.0
www.analogictech.com
1

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AAT1161 pdf
SwitchRegTM
Typical Characteristics
Efficiency vs. Load Current
(VOUT = 5V)
100
90
80
70
60
50
www.DataShe4e0t4U.com
30
20
10
0
0.0001
0.001
0.01
0.1
VIN = 6V
VIN = 7V
VIN = 10V
VIN = 12V
VIN = 13.2V
1 10
Load Current (A)
1
0.75
0.5
0.25
0
-0.25
-0.5
-0.75
-1
0.0001
Load Regulation
(VOUT = 5V)
0.001
0.01
0.1
Load Current (A)
VIN = 13.2V
VIN = 12V
VIN = 10V
VIN = 7V
VIN = 6V
1 10
Line Regulation
(VOUT = 5V)
1
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1
6
3A
1.5A
1A
100mA
10mA
7
8
9 10 11 12
Input Voltage (V)
PRODUCT DATASHEET
AAT1161
13.2V Input, 3A Step-Down Converter
100
90
80
70
60
50
40
30
20
10
0
0.0001
Efficiency vs. Load Current
(VOUT = 3.3V)
0.001
0.01 0.1
Load Current (A)
VIN = 5V
VIN = 7V
VIN = 10V
VIN = 12V
VIN = 13.2V
1 10
Load Regulation
(VOUT = 3.3V)
1.5
1.25
VIN = 13.2V
VIN = 12V
1 VIN = 10V
0.75
VIN = 7V
VIN = 6V
0.5
0.25
0
-0.25
-0.5
0.0001
0.001
0.01
0.1
Load Current (A)
1
10
Line Regulation
(VOUT = 3.3V)
1
0.8
0.6
0.4
0.2
0
-0.2 3A
-0.4 1.5A
-0.6 1A
-0.8
100mA
10mA
-1
56
789
10 11 12
Input Voltage (V)
1161.2008.03.1.0
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AAT1161 arduino
SwitchRegTM
To estimate the required input capacitor size, determine
the acceptable input ripple level (VPP) and solve for C.
The calculated value varies with input voltage and is a
maximum when VIN is double the output voltage.
CIN =
VO
VIN
·
⎛⎝1 -
VO
VIN
VPP
IO
- ESR⎞⎠ · FOSC
www.DataSheet4U.com
VO
VIN
·
⎛⎝1 -
VO
VIN
=
1
4
for
VIN
=
2
·
VO
1
CIN(MIN) = VPP
IO
- ESR⎞⎠ · 4 · FOSC
Always examine the ceramic capacitor DC voltage coef-
ficient characteristics when selecting the proper value.
For example, the capacitance of a 10μF, 16V, X5R ceram-
ic capacitor with 12V DC applied is actually about
8.5μF.
The maximum input capacitor RMS current is:
IRMS = IO ·
VO
VIN
·
⎛⎝1 -
VO
VIN
The input capacitor RMS ripple current varies with the
input and output voltage and will always be less than or
equal to half of the total DC load current:
VO · 1 - VO= D · (1 - D) = 0.52 = 1
VIN VIN
2
for VIN = 2 · VO
I =RMS(MAX)
IO
2
The
term
VO
VIN
·
⎛⎝1
-
VO
VIN
appears
in
both
the
input
voltage
rip-
ple and input capacitor RMS current equations and is at
maximum when VO is twice VIN. This is why the input
voltage ripple and the input capacitor RMS current ripple
are a maximum at 50% duty cycle. The input capacitor
provides a low impedance loop for the edges of pulsed
current drawn by the AAT1161. Low ESR/ESL X7R and
X5R ceramic capacitors are ideal for this function. To
minimize stray inductance, the capacitor should be
placed as closely as possible to the IC. This keeps the
high frequency content of the input current localized,
PRODUCT DATASHEET
AAT1161
13.2V Input, 3A Step-Down Converter
minimizing EMI and input voltage ripple. The proper
placement of the input capacitor (C6) can be seen in the
evaluation board layout in Figure 3. Additional noise fil-
tering for proper operation is accomplished by adding a
small 0.1µF capacitor on the IN pins (C2).
A laboratory test set-up typically consists of two long
wires running from the bench power supply to the eval-
uation board input voltage pins. The inductance of these
wires, along with the low-ESR ceramic input capacitor,
can create a high Q network that may affect converter
performance. This problem often becomes apparent in
the form of excessive ringing in the output voltage dur-
ing load transients. Errors in the loop phase and gain
measurements can also result. Since the inductance of a
short PCB trace feeding the input voltage is significantly
lower than the power leads from the bench power sup-
ply, most applications do not exhibit this problem. In
applications where the input power source lead induc-
tance cannot be reduced to a level that does not affect
the converter performance, a high ESR tantalum or alu-
minum electrolytic should be placed in parallel with the
low ESR, ESL bypass ceramic. This dampens the high Q
network and stabilizes the system.
Output Capacitor Selection
The output capacitor is required to keep the output volt-
age ripple small and to ensure regulation loop stability.
The output capacitor must have low impedance at the
switching frequency. Ceramic capacitors with X5R or
X7R dielectrics are recommended due to their low ESR
and high ripple current. The output ripple VOUT is deter-
mined by:
VOUT
VOUT · (VIN -
VIN · FOSC
VOUT)
·L
·
ESR
+
1
8 · FOSC · COUT
The output capacitor limits the output ripple and pro-
vides holdup during large load transitions. A 10μF to
47μF X5R or X7R ceramic capacitor typically provides
sufficient bulk capacitance to stabilize the output during
large load transitions and has the ESR and ESL charac-
teristics necessary for low output ripple. The output volt-
age droop due to a load transient is dominated by the
capacitance of the ceramic output capacitor. During a
step increase in load current, the ceramic output capac-
itor alone supplies the load current until the loop
responds. Within two or three switching cycles, the loop
responds and the inductor current increases to match
the load current demand. The relationship of the output
1161.2008.03.1.0
www.analogictech.com
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