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ADUM5404 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADUM5404
Beschreibung (ADUM5401 - ADUM5404) Quad-Channel Isolators
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 24 Seiten
ADUM5404 Datasheet, Funktion
Quad-Channel Isolators with
Integrated DC-to-DC Converter
ADuM5401/ADuM5402/ADuM5403/ADuM5404
FEATURES
isoPower integrated, isolated dc-to-dc converter
Regulated 3.3 V or 5 V output
500 mW output power
Quad dc-to-25 Mbps (NRZ) signal isolation channels
Schmitt trigger inputs
16-lead SOIC package with >8 mm creepage
www.DataSheeHt4iUgh.cotemmperature operation: 105°C
High common-mode transient immunity: >25 kV/μs
Safety and regulatory approvals (pending)
UL recognition
2500 V rms for 1 minute per UL1577
CSA Component Acceptance Notice #5A
VDE certificate of conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 560 V peak
APPLICATIONS
RS-232/RS-422/RS-485 transceiver
Industrial field bus isolation
Power supply startup bias and gate drive
Isolated sensor interface
Industrial PLC
GENERAL DESCRIPTION
The ADuM5401/ADuM5402/ADuM5403/ADuM54041 devices
are quad-channel digital isolators with isoPower, an integrated,
isolated dc-to-dc converter. Based on the Analog Devices, Inc.,
iCoupler® technology, the dc-to-dc converter provides up to
500 mW of regulated, isolated power at either 5.0 V from a 5.0 V
input supply or 3.3 V from a 3.3 V supply. This eliminates the need
for a separate, isolated dc-to-dc converter in low power, isolated
designs. The iCoupler chip scale transformer technology is used
to isolate the logic signals and the magnetic components of the
dc-to-dc converter. The result is a small form factor, total isolation
solution.
The ADuM5401/ADuM5402/ADuM5403/ADuM5404 isolators
provide four independent isolation channels in a variety of
channel configurations and data rates (see the Ordering Guide
for more information).
1 Protected by U.S. Patents 5,952,849; 6,873,065; and 7075 329 B2. Other
patents pending.
FUNCTIONAL BLOCK DIAGRAMS
VDD1 1
GND1 2
I/OA 3
I/OB 4
I/OC 5
I/OD 6
NC 7
GND1 8
OSC
RECT REG
4 CHANNEL iCOUPLER CORE
ADuM5401/ADuM5402/
ADuM5403/ADuM5404
Figure 1.
16 VISO
15 GNDISO
14 I/OA
13 I/OB
12 I/OC
11 I/OD
10 VSEL
9 GNDISO
VIA VOA
3 14
VIB ADuM5401 VOB
4 13
VIC
5
VOC
12
VOD
6
VID
11
Figure 2. ADuM5401
VIA VOA
3 14
VIB ADuM5402 VOB
4 13
VOC
5
VIC
12
VOD
6
VID
11
Figure 3. ADuM5402
VIA VOA
3 14
VOB ADuM5403 VIB
4 13
VOC
5
VIC
12
VOD
6
VID
11
Figure 4. ADuM5403
VOA
VIA
3 14
VOB ADuM5404 VIB
4 13
VOC
5
VIC
12
VOD
6
VID
11
Figure 5. ADuM5404
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.






ADUM5404 Datasheet, Funktion
ADuM5401/ADuM5402/ADuM5403/ADuM5404
Parameter
ADuM5401CRWZ/ADuM5402CRWZ/
ADuM5403CRWZ/ADuM5404CRWZ
Minimum Pulse Width
Maximum Data Rate
Propagation Delay
Pulse Width Distortion, |tPLH − tPHL|
Change vs. Temperature
Propagation Delay Skew
Channel-to-Channel Matching,
Codirectional Channels
Channel-to-Channel Matching,
Opposing Directional Channels
www.DataShOeeutt4pUu.tcRoimse/Fall Time (10% to 90%)
Common-Mode Transient Immunity
at Logic High Output
Common-Mode Transient Immunity
at Logic Low Output
Refresh Rate
Symbol Min
PW
tPHL, tPLH
PWD
tPSK
tPSKCD
tPSKOD
tR/tF
|CMH|
|CML|
fr
25
25
25
Typ Max
40
45 60
6
5
45
6
15
2.5
35
35
1.0
Unit Test Conditions/Comments
ns
Mbps
ns
ns
ps/°C
ns
ns
ns
ns
kV/μs
kV/μs
Mbps
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
CL = 15 pF, CMOS signal levels
VIx = VDD or VISO, VCM = 1000 V,
transient magnitude = 800 V
VIx = 0 V, V = 1000 V,
transient magnitude = 800 V
1 The contributions of supply current values for all four channels are combined at identical data rates.
2 The VISO supply current is available for external use when all data rates are below 2 Mbps. At data rates above 2 Mbps, the data I/O channels draw additional
current proportional to the data rate. Additional supply current associated with an individual channel operating at a given data rate can be calculated as
described in the Power Consumption section. The dynamic I/O channel load must be treated as an external load and included in the VISO power budget.
3 The power demands of the quiescent operation of the data channels cannot be separated from the power supply section. Efficiency includes the quiescent
power consumed by the I/O channels as part of the internal power consumption.
4 This current is available for driving external loads at the VISO pin. All channels are simultaneously driven at a maximum data rate of 25 Mbps with full capacitive
load representing the maximum dynamic load conditions. Refer to the Power Consumption section for calculation of available current at less than the maximum
data rate.
Rev. 0 | Page 6 of 24

6 Page









ADUM5404 pdf, datenblatt
ADuM5401/ADuM5402/ADuM5403/ADuM5404
VDD1 1
16 VISO
GND1 2
15 GNDISO
VIA 3 ADuM5403 14 VOA
VOB 4 TOP VIEW 13 VIB
VOC 5 (Not to Scale) 12 VIC
VOD 6
11 VID
NC 7
10 VSEL
GND1 8
9 GNDISO
Figure 9. ADuM5403 Pin Configuration
Table 13. ADuM5403 Pin Function Descriptions
Pin No. Mnemonic Description
www.Data1Sheet4U.VcoDDm1
Primary Supply Voltage, 3.0 V to 5.5 V.
2, 8 GND1
Ground 1. Ground reference for isolator primary. Pin 2 and Pin 8 are internally connected, and it is recommended that both
pins be connected to a common ground.
3 VIA
Logic Input A.
4 VOB
Logic Output B.
5 VOC
Logic Output C.
6 VOD
Logic Output D.
7 NC
Make no connection to this pin.
9, 15 GNDISO
Ground Reference for Isolator Side 2. Pin 9 and Pin 15 are internally connected, and it is recommended that both pins be
connected to a common ground.
10 VSEL
Output Voltage Selection. When VSEL = VISO, the VISO setpoint is 5.0 V. When VSEL = GNDISO, the VISO setpoint is 3.3 V.
VDD1 and VISO voltages must be in the same operating range to guarantee proper operation of the data channels.
11 VID
Logic Input D.
12 VIC
Logic Input C.
13 VIB
Logic Input B.
14 VOA
Logic Output A.
16 VISO
Secondary Supply Voltage Output for External Loads, 3.3 V (VSEL Low) or 5.0 V (VSEL High). VDD1 and VISO voltages must be
in the same operating range to guarantee proper operation of the data channels.
Rev. 0 | Page 12 of 24

12 Page





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