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Teilenummer | DS1854 |
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Beschreibung | Dual Temperature-Controlled Resistors | |
Hersteller | Maxim Integrated Products | |
Logo | ||
Gesamt 22 Seiten Rev 0; 1/03
Dual Temperature-Controlled Resistors with
Two Monitors
General Description
The DS1854 dual temperature-controlled nonvolatile
(NV) variable resistors with two monitors consists of two
50kΩ 256-position linear variable resistors, two analog
monitor inputs (MON1, MON2), and a direct-to-digital
temperature sensor. The device provides an ideal
method for setting and temperature-compensating bias
voltages and currents in control applications using min-
www.DataSheeiEmtE4aUPl.RccoOimrcMuimtrye.mTohrey
variable resistor settings are stored in
and can be accessed over the 2-wire
serial bus.
Applications
Optical Transceivers
Optical Transponders
Instrumentation and Industrial Controls
RF Power Amps
Diagnostic Monitoring
Features
♦ Four Total Monitored Channels (Temperature,
VCC, MON1, MON2)
♦ Two External Analog Inputs (MON1, MON2)
♦ Internal Direct-to-Digital Temperature Sensor
♦ Two 50kΩ, Linear, 256-Position, Nonvolatile
Temperature-Controlled Variable Resistors
♦ Resistor Settings Changeable Every 2°C
♦ Access to Monitoring and ID Information
Configurable with Separate Device Addresses
♦ Resistor Disable (Open-Circuit) Function
♦ 2-Wire Serial Interface
♦ Two Buffers with TTL/CMOS-Compatible Inputs
and Open-Drain Outputs
♦ Operates from a 3.3V or 5V Supply
♦ SFF-8472 Compatible
Ordering Information
PART
DS1854E-050
TEMP RANGE PIN-PACKAGE
-40°C to +95°C 16 TSSOP
DS1854E-050/T&R
-40°C to +95°C
16 TSSOP
(Tape-and-Reel)
DS1854B-050
-40°C to +95°C 16-Ball CSBGA
Typical Operating Circuit
VCC
4.7kΩ
2-WIRE
INTERFACE
TX-FAULT
LOS
GROUND TO
DISABLE WRITE
PROTECT
VCC = 3.3V
4.7kΩ
1
SDA
2
SCL
3
OUT1
4
IN1
5
OUT2
6
IN2
7
WPEN
8
GND
DS1854
16
VCC
H1 15
14
L1
13
H0
12
L0
0.1µF
DECOUPLING
CAP
TO LASER BIAS
CONTROL
TO LASER
MODULATION
CONTROL
11 Rx POWER*
MON2
10 Tx BIAS*
MON1
RHIZ 9 Tx DISABLE
DIAGNOSTIC
INPUTS
0 TO 2.5V FS
*Rx POWER AND Tx BIAS CAN BE ARBITRARILY
ASSIGNED TO THE MON INPUTS
Pin Configurations
TOP VIEW
A
IN1
SCL VCC
1 SDA
H1
2 SCL
VCC 16
H1 15
B OUT2 SDA
H0
3 OUT1
L1
4 IN1
L1 14
H0 13
5 OUT2 DS1854
C WPEN IN2 OUT1 MON2
L0 12
6 IN2
MON2 11
7 WPEN
D GND L0 RHIZ MON1
8 GND
MON1 10
RHIZ 9
1234
16-BALL CSBGA (4mm x 4mm)
1.0mm PITCH
16 TSSOP
______________________________________________ Maxim Integrated Products 1
For pricing delivery, and ordering information please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Dual Temperature-Controlled Resistors with
Two Monitors
Typical Operating Characteristics (continued)
(VCC = 5.0V, TA = +25°C, unless otherwise noted.)
RESISTOR 0 INL (LSB)
0.5
0.4
www.DataSheet4U0..c3 om
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
0 25 50 75 100 125 150 175 200 225 250
POSITION
RESISTOR 1 DNL (LSB)
0.25
RESISTOR 0 DNL (LSB)
0.25
0.15
0.05
-0.05
-0.15
-0.25
0 25 50 75 100 125 150 175 200 225 250
POSITION
RESISTANCE vs. POWER-UP VOLTAGE
+25°C
300
RESISTOR 1 INL (LSB)
0.5
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
0 25 50 75 100 125 150 175 200 225 250
POSITION
POSITION 00H RESISTANCE vs. TEMPERATURE
1.00
0.15 250
200
0.05
150
-0.05
100
-0.15
50
0.99
0.98
0.97
0.96
-0.25
0 25 50 75 100 125 150 175 200 225 250
POSITION
0
012345
POWER-UP VOLTAGE (V)
0.95
-40 -25 -10 5 20 35 50 65 80 95
TEMPERATURE (°C)
POSITION FFH RESISTANCE vs. TEMPERATURE
52.40
PPM vs. POSITION
340
52.30
52.20
290
240
190
52.10
52.00
51.90
140
+25°C TO +85°C
90
40
+25°C TO -40°C
-10
51.80
-40 -25 -10 5 20 35 50 65 80 95
TEMPERATURE (°C)
-60
0
50 100 150 200 250 300
POSITION
6 _____________________________________________________________________
6 Page Dual Temperature-Controlled Resistors with
Two Monitors
Register Map
A description of the registers is below. The registers
are read only (R) or read/write (R/W). The R/W registers
are writable only if write protect has not been asserted
(see the Memory Description section).
www.DataSheeAt4uU.xcoilmiary Device
MEMORY LOCATION EEPROM/SRAM
00 to 7F
EEPROM
R/W
R/W
DEFAULT SETTING
00
NAME OF LOCATION
Standards Data
Main Device
FUNCTION
MEMORY
LOCATION
EEPROM/
SRAM
R/W DEFAULT NAME OF LOCATION
SETTING
FUNCTION
00 to 01
Contains upper limit settings for temperature.
EEPROM
R/W
00
TMPlimhi (MSB to LSB) If the limit is violated, a flag in Main Device
byte 70h is set.
02 to 03
04 to 07
08 to 09
Contains lower limit settings for temperature.
EEPROM
R/W
00
TMPlimlo (MSB to LSB) If the limit is violated, a flag in Main Device
byte 70h is set.
EEPROM
R
00
Reserved
—
Contains upper limit settings for VCC. If the
EEPROM
R/W
00
VCClimhi (MSB to LSB) limit is violated, a flag in Main Device byte
70h is set.
0A to 0B
0C to 0F
10 to 11
EEPROM
EEPROM
EEPROM
R/W
R/W
Contains lower limit settings for VCC. If the
00 VCClimlo (MSB to LSB) limit is violated, a flag in Main Device byte
70h is set.
00 Reserved
—
Contains upper limit settings for MON1. If the
00 MON1limhi (MSB to LSB) limit is violated, a flag in Main Device byte
70h is set.
12 to 13
EEPROM
R/W
Contains lower limit settings for MON1. If the
00 MON1limlo (MSB to LSB) limit is violated, a flag in Main Device byte
70h is set.
14 to 17
18 to 19
EEPROM
EEPROM
R/W
00 Reserved
00 MON2limhi (MSB to LSB)
1A to 1B
EEPROM
R/W
00 MON2limlo (MSB to LSB)
Note: SRAM defaults are power-on defaults. EEPROM defaults are factory defaults.
—
Contains upper limit settings for MON2. If the
limit is violated, a flag in Main Device byte
70h is set.
Contains lower limit settings for MON2. If the
limit is violated, a flag in Main Device byte
70h is set.
12 ____________________________________________________________________
12 Page | ||
Seiten | Gesamt 22 Seiten | |
PDF Download | [ DS1854 Schematic.PDF ] |
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