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PDF ESDA6V1-4F1 Data sheet ( Hoja de datos )
| Número de pieza | ESDA6V1-4F1 | |
| Descripción | QUAD TRANSIL ARRAY | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ESDA6V1-4F1 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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®
A.S.D.™
ESDA6V1-4F1
QUAD TRANSIL™ ARRAY
FOR ESD PROTECTION
APPLICATIONS
www.DataSheet4UW.cohmere transient overvoltage protection in ESD
sensitive equipment is required, such as :
s Computers
s Printers
s Communication systems
s GSM handsets and accessories
s Other telephone sets
s Set top boxes
DESCRIPTION
The ESDA6V1-4F1 is a 4-bit wide monolithic
suppressor designed to protect against ESD
components which are connected to data and
transmission lines.
It clamps the voltage just above the logic level
supply for positive transients, and to a diode
forward voltage drop below ground for negative
transients.
FEATURES
s 4 Unirectional transil functions
s Breakdown voltage: VBR = 6.1Vmin
s Low leakage current < 10 µA
s Very low PCB space consuming
321
A Z1 GND Z3
B Z2 GND Z4
Flip Chip
(Bump side)
FUNCTIONAL DIAGRAM
A3 A2
A1
BENEFITS
s > ± 15kV ESD Protection
s High integration
s Suitable for high density boards
B3 B2 B1
ESD RESPONSE TO IEC61000-4-2
(air discharge 16kV, positive surge)
COMPLIES WITH THE FOLLOWING STAN-
DARDS:
- IEC61000-4-2: Level 4
15 kV (air discharge)
8 kV (contact discharge)
- MIL STD 883E-Method 3015-6: class3
(Human body model)
July 2002 - Ed: 2A
1/6
1 page  
ESDA6V1-4F1
www.DataSheet4U.com
ESDA6V1-4F1
The ESDA6V1-4F1 array is the ideal product for use as board level protection of ESD sensitive
semiconductor components.
The Flip Chip package makes the ESDA6V1-4F1 device some of the smallest ESD protection devices
available. It also allows design flexibility in the design of “crowded” boards where the space saving is at a
premium. This enables to shorten the routing and can contribute to improved ESD performance.
LAYOUT RECOMMENDATIONS
Copper Pad
Cu - Ni (2-6µm) - Au (0.2µm max)
∅ = 250µm (300µm max)
500µm
500µm
Ø =320µm max (stencil aperture)
Solder paste
Stencil Design
thickness of 150µm
Ø =340µm min (for 300µm ∅ pad
Non Solder mask opening
Circuit board layout is a critical design step in the suppression of ESD induced transients. The following
guidelines are recommended :
s The ESDA6V1-4F1 should be placed as close as possible to the input terminals or connectors.
s Minimise the path length between the ESD suppressor and the protected device
s Minimise all conductive loops, including power and ground loops
s The ESD transient return path to ground should be kept as short as possible.
s Use ground planes whenever possible.
5/6
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet ESDA6V1-4F1.PDF ] | |
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