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DS1996 Schematic ( PDF Datasheet ) - Dallas Semiconductor

Teilenummer DS1996
Beschreibung 64kbit Memory iButtonTM
Hersteller Dallas Semiconductor
Logo Dallas Semiconductor Logo 




Gesamt 18 Seiten
DS1996 Datasheet, Funktion
www.dalsemi.com
SPECIAL FEATURES
§ 65536 bits of read/write nonvolatile memory
§ Overdrive mode boosts communication
speed to 142k bits per second
§ 256-bit scratchpad ensures integrity of data
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transfer
§ Memory partitioned into 256-bit pages for
packetizing data
§ Data integrity assured with strict read/write
protocols
§ Operating temperature range from -40°C to
+70°C
§ Over 10 years of data retention
COMMON iButton FEATURES
§ Unique, factory-lasered and tested 64-bit
registration number (8-bit family code + 48-
bit serial number 8-bit CRC tester) assures
absolute traceability because no two parts are
alike
§ Multidrop controller for MicroLAN
§ Digital identification and information by
momentary contact
§ Chip-based data carrier compactly stores
information
§ Data can be accessed while affixed to object
§ Economically communicates to bus master
with a single digital signal at 16.3k bits per
second
§ Standard 16 mm diameter and 1-WireTM
protocol ensure compatibility with iButton
family
§ Button shape is self-aligning with cup-
shaped probes
§ Durable stainless steel case engraved with
registration number withstands harsh
environments
DS1996
64kbit Memory iButtonTM
F5 MICROCANTM
5.89
0.36
0.51
c 1993 16.25
YYWW REGISTERED RR
5E 0C
000000FBC52B
17.35
DATA
GROUND
All dimensions are shown in millimeters
§ Easily affixed with self-stick adhesive
backing, latched by its flange, or locked with
a ring pressed onto its rim
§ Presence detector acknowledges when reader
first applies voltage
§ Meets UL#913 (4th Edit); Intrinsically Safe
Apparatus, Approved under Entity Concept
for use in Class I, Division 1, Group A, B, C
and D Locations (application pending)
ORDERING INFORMATION
DS1996L-F5 F5 MicroCan
EXAMPLES OF ACCESSORIES
DS9096P
Self-Stick Adhesive Pad
DS9101
Multi-Purpose Clip
DS9093RA
Mounting Lock Ring
DS9093F
Snap-In Fob
DS9092
iButton Probe
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DS1996 Datasheet, Funktion
DS1996
Write Scratchpad Command [0FH]
After issuing the write scratchpad command, the master must first provide the 2-byte target address,
followed by the data to be written to the scratchpad. The data will be written to the scratchpad starting at
the byte offset (T4:T0). The ending offset (E4: E0) will be the byte offset at which the bus master has
stopped writing data.
Read Scratchpad Command [AAH]
This command is used to verify scratchpad data and target address. After issuing the read scratchpad
command, the master begins reading. The first two bytes will be the target address. The next byte will be
the ending offset/data status byte (E/S) followed by the scratchpad data beginning at the byte offset (T4:
T0). The master may read data until the end of the scratchpad after which the data read will be all logic
1’s.
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DS1996 MEMORY MAP Figure 5
ADDRESS REGISTERS Figure 6
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6 Page









DS1996 pdf, datenblatt
DS1996
1-WIRE SIGNALING
The DS1996 requires strict protocols to ensure data integrity. The protocol consists of four types of
signaling on one line: Reset Sequence with Reset Pulse and Presence Pulse, Write 0, Write 1 and Read
Data. All these signals except presence pulse are initiated by the bus master. The DS1996 can
communicate at two different speeds, regular speed and Overdrive speed. If not explicitly set into the
overdrive mode, the DS1996 will communicate at regular speed. While in Overdrive Mode the fast timing
applies to all wave forms.
The initialization sequence required to begin any communication with the DS1996 is shown in Figure 10.
A reset pulse followed by a presence pulse indicates the DS1996 is ready to send or receive data given the
correct ROM command and memory function command. The bus master transmits (TX) a reset pulse
(tRSTL , minimum 480 µs at regular speed, 48 µs at Overdrive speed). The bus master then releases the
line and goes into receive mode (RX). The 1-Wire bus is pulled to a high state via the pullup resistor.
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After detecting the rising edge on the data contact, the DS1996 waits (tPDH, 15-60 µs at regular speed, 2-6
µs at Overdrive speed) and then transmits the presence pulse (tPDL, 60-240 µs at regular speed, 8-24 µs at
Overdrive speed).
A Reset Pulse of 480 µs or longer will exit the Overdrive Mode returning the device to regular speed. If
the DS1996 is in Overdrive Mode and the Reset Pulse is no longer than 80 µs the device will remain in
Overdrive Mode.
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12 Page





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