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PDF EDI8F8512C Data sheet ( Hoja de datos )
| Número de pieza | EDI8F8512C | |
| Descripción | 512Kx8 STATIC RAM CMOS | |
| Fabricantes | White Electronic Designs Corporation | |
| Logotipo |  |
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White Electronic Designs
EDI8F8512C
512Kx8 STATIC RAM CMOS, MODULE
FEATURES
512Kx8 bit CMOS Static
Random Access Memory
• Access Times 20 through 100ns
• Data Retention Function (EDI8F8512LP)
• TTL Compatible Inputs and Outputs
• Fully Static, No Clocks
High Density Packaging
www.DataS•h3e6etP4iUn .ScoIPm, No. 63
• 32 Pin DIP, JEDEC Pinout, No. 91 (55-100ns)
• 32 Pin DIP, JEDEC Pinout, No. 183 (20-35ns)
Single +5V (±10%) Supply Operation
*This product is subject to change without notice.
DESCRIPTION
The EDI8F8512C is a 4096K bit CMOS Static RAM based on four
128Kx8 or 256Kx4 (high speed) Static RAMs mounted on a multi-
layered epoxy laminate (FR4) substrate.
Functional equivalence to the monolithic four megabit Static RAM
is achieved by utilization of an on-board decoder that interprets the
higher order address(es) to select one of the128Kx8 or 256Kx4 Static
RAMs.
The 32 pin DIP pinout adheres to the JEDEC standard for the four
megabit device, to ensure compatibility with future monolithics.
A low power version with data retention (EDI8F8512LP) is also
available.
All inputs and outputs are TTL compatible and operate from a single
5V supply. Fully asynchronous, the EDI8F8512C requires no clocks
or refreshing for operation.
FIG. 1 PIN CONFIGURATIONS
NC
VCC
W#
DQ2
DQ3
DQ0
A1
A2
A3
A4
VSS
DQ5
A10
A11
A5
A13
A14
NC
E#
A15
A16
A12
A18
A6
DQ1
VSS
A0
A7
A8
A9
DQ7
DQ4
DQ6
A17
VCC
G#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
8F8512C Pin Config.
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 VCC
31 A15
30 A17
29 W#
28 A13
27 A8
26 A9
25 A11
24 G#
23 A10
22 E#
21 DQ7
20 DQ6
19 DQ5
18 DQ4
17 DQ3
8F8512C Pin Config
A0-A18
E#
W#
G#
DQ0-DQ7
VCC
VSS
NC
PIN NAMES
Address Inputs
Chip Enable
Write Enable
Output Enable
Common Data Input/Output
Power (+5V±10%)
Ground
No Connection
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
July 2002
Rev. 13A
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
1 page  
White Electronic Designs
EDI8F8512C
AC CHARACTERISTICS READ CYCLE
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Chip Enable to Output in Low Z (1)
Chip Disable to Output in High Z (1)
Output Hold from Address Change
Output Enable to Output Valid
Output Enable to Output in Low Z (1)
www.DataSheOeut4tpUut.cDoismable to Output in High Z (1)
Note 1: Parameter guaranteed, but not tested.
Symbol
JEDEC Alt.
tAVAV
tRC
tAVQV
tAA
tELQV
tACS
tELQX
tCLZ
tEHQZ
tCHZ
tAVQX
tOH
tGLQV
tOE
tGLQX
tOLZ
tGHQZ
tOHZ
55ns
Min Max
55
55
55
5
30
3
40
0
30
70ns
Min Max
70
70
70
5
30
3
40
0
30
85ns
Min Max
85
85
85
5
35
3
45
0
35
100ns
Min Max
100
100
100
5
40
3
50
0
40
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC CHARACTERISTICS WRITE CYCLE
Write Cycle
Parameter
Write Cycle Time
Chip Enable to End of Write
Symbol
JEDEC Alt.
tAVAV
tWC
tELWH
tELEH
tCW
tCW
20ns
Min Max
20
15
15
25ns
Min Max
25
20
20
Address Setup Time
Address Valid to End of Write
Write Pulse Width
tAVWL
tAVEL
tAVWH
tAVEH
tWLWH
tWLEH
tAS
tAS
tAW
tAW
tWP
tWP
0
0
15
15
15
15
0
0
20
20
20
20
Write Recovery Time
tWHAX
tEHAX
tWR
TWR
0
0
0
0
Data Hold Time
tWHDX
tEHDX
tDH
tDH
3
3
3
3
Write to Output in High Z (1)
tWLQZ
tWHZ
0
10
0
12
Data to Write Time
tDVWH
tDVEH
tDW
tDW
12
12
15
15
Output Active from End of Write (1)
tWHQX
tWLZ
3
3
Note 1: Parameter guaranteed, but not tested.
35ns
Min Max
35
30
30
0
0
30
30
25
25
0
0
3
3
0 15
20
20
3
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
July 2002
Rev. 13A
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet EDI8F8512C.PDF ] | |
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