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PDF EN29LV800 Data sheet ( Hoja de datos )
| Número de pieza | EN29LV800 | |
| Descripción | 8 Megabit (1024K x 8-bit / 512K x 16-bit) Flash Memory Boot Sector Flash Memory | |
| Fabricantes | Eon Silicon Solution | |
| Logotipo |  |
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EN29LV800
E8dNMa20e9g.LaVbi8t0(01024K x 8-bit / 512K x 16-bit) Flash Memory
Boot Sector Flash Memory, CMOS 3.0 Volt-only
FEATURES
• Single power supply operation
- Full voltage range: 2.7-3.6 volt read and write
operations for battery-powered applications.
- Regulated voltage range: 3.0-3.6 volt read
and write operations and for compatibility with
high performance 3.3 volt microprocessors.
• Manufactured on 0.28 µm process technology
www.DataSheet-•4UAH.cicgcohemspsertfimoremsaanscefast as 70 ns
• Low power consumption (typical values at 5
MHz)
- 7 mA typical active read current
- 15 mA typical program/erase current
- 1 µA typical standby current (standard access
time to active mode)
• Flexible Sector Architecture:
- One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
fifteen 64 Kbyte sectors (byte mode)
- One 8 Kword, two 4 Kword, one 16 Kword
and fifteen 32 Kword sectors (word mode)
- Supports full chip erase
- Individual sector erase supported
- Sector protection:
Hardware locking of sectors to prevent
program or erase operations within individual
sectors
Additionally, temporary Sector Group
Unprotect allows code changes in previously
locked sectors.
• High performance program/erase speed
- Byte/Word program time: 8µs typical
- Sector erase time: 500ms typical
• JEDEC Standard program and erase
commands
• JEDEC standard DATA polling and toggle
bits feature
• Single Sector and Chip Erase
• Sector Unprotect Mode
• Embedded Erase and Program Algorithms
• Erase Suspend / Resume modes:
Read or program another Sector during
Erase Suspend Mode
• 0.28 µm double-metal double-poly
triple-well CMOS Flash Technology
• Low Vcc write inhibit < 2.5V
• >100K program/erase endurance cycle
• 48-pin TSOP (Type 1)
• Commercial Temperature Range
GENERAL DESCRIPTION
The EN29LV800 is an 8-Megabit, electrically erasable, read/write non-volatile flash memory,
organized as 1,048,576 bytes or 524,288 words. Any byte can be programmed typically in 10µs.
The EN29LV800 features 3.0V voltage read and write operation, with access times as fast as 55ns to
eliminate the need for WAIT states in high-performance microprocessor systems.
The EN29LV800 has separate Output Enable ( OE ), Chip Enable ( CE ), and Write Enable (WE)
controls, which eliminate bus contention issues. This device is designed to allow either single Sector
or full chip erase operation, where each Sector can be individually protected against program/erase
operations or temporarily unprotected to erase or program. The device can sustain a minimum of
100K program/erase cycles on each Sector.
4800 Great America Parkway, Suite 202
1
Santa Clara, CA 95054
Rev 0.4 Release Date: 2002/01/29
Tel: 408-235-8680
Fax: 408-235-8685
1 page  
PRODUCT SELECTOR GUIDE
Product Number
Speed Option
Regulated Voltage Range: Vcc=3.0 – 3.6 V
Full Voltage Range: Vcc=2.7 – 3.6 V
Max Access Time, ns (tacc)
Max CE# Access, ns (tce)
Max OE# Access, ns (toe)
EN29LV800
-70R
70
70
30
EN29LV800
-90
90
90
35
BLOCK DIAGRAM
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RY/BY
Vcc
Vss
State
Control
WE
Command
Register
CE
OE
Vcc Detector
A0-A18
Block Protect Switches
Erase Voltage Generator
DQ0-DQ15 (A-1)
Input/Output Buffers
Program Voltage
Generator
Chip Enable
Output Enable
Logic
STB
Data Latch
Timer
Y-Decoder
STB
X-Decoder
Y-Gating
Cell Matrix
4800 Great America Parkway, Suite 202
5
Santa Clara, CA 95054
Rev 0.4 Release Date: 2002/01/29
Tel: 408-235-8680
Fax: 408-235-8685
5 Page 
EN29LV800
COMMAND DEFINITIONS
The operations of the EN29LV800 are selected by one or more commands written into the
command register to perform Read/Reset Memory, Read ID, Read Sector Protection, Program,
Sector Erase, Chip Erase, Erase Suspend and Erase Resume. Commands are made up of data
sequences written at specific addresses via the command register. The sequences for the
specified operation are defined in the Command Definitions table (Table 5). Incorrect addresses,
incorrect data values or improper sequences will reset the device to Read Mode.
Table 5. EN29LV800 Command Definitions
Bus Cycles
Command
Sequence
1st
Write Cycle
2nd
Write Cycle
3rd
Write Cycle
4th
Write Cycle
5th
Write Cycle
Add Data Add Data Add Data Add Data Add Data
Read
1 RA RD
Reset
1 xxx F0
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Manufacturer
ID
Word
Byte
4
555
AA
AAA
2AA
55
555
555
AAA
90
000/
001
000/
001
7F/
1C
7F/
1C
Device ID
Top Boot
Word
Byte
4
555
AAA
AA
2AA
555
55
555
AAA
90
X01 22DA
X02 DA
Device ID
Bottom Boot
Word 4 555 AA 2AA 55
Byte
AAA
555
555 90
AAA
X01 225B
X02 5B
Sector Protect Word
Verify
Byte
4
555
AA
AAA
2AA
55
555
555
AAA
90
(SA)
X02
(SA)
X04
XX00
XX01
00
01
Program
Word
Byte
4
555
AAA
AA
2AA
555
55
555
AAA
A0
PA PD
Unlock Bypass
Word
Byte
3
555
AAA
AA
2AA
555
55
555
AAA
20
Unlock Bypass Program 2 XXX A0 PA PD
Unlock Bypass Reset
2 XXX 90 XXX 00
Chip Erase
Word
Byte
6
555
AAA
AA
2AA
555
55
555
AAA
80
555
AAA
AA
2AA
555
55
Sector Erase
Word
Byte
6
555
AAA
AA
2AA
555
55
555
AAA
80
555
AAA
AA
2AA
555
55
Erase Suspend
1 xxx B0
Erase Resume
1 xxx 30
Address and Data values indicated in hex
RA = Read Address: address of the memory location to be read. This is a read cycle.
RD = Read Data: data read from location RA during Read operation. This is a read cycle.
PA = Program Address: address of the memory location to be programmed. X = Don’t-Care
PD = Program Data: data to be programmed at location PA
SA = Sector Address: address of the Sector to be erased or verified. Address bits A18-A12 uniquely select any Sector.
6th
Write Cycle
Add Data
555
AAA
SA
10
30
Reading Array Data
The device is automatically set to reading array data after power up. No commands are required to
retrieve data. The device is also ready to read array data after completing an Embedded Program or
Embedded Erase algorithm.
Following an Erase Suspend command, Erase Suspend mode is entered. The system can read array
data using the standard read timings, with the only difference in that if it reads at an address within erase
suspended sectors, the device outputs status data. After completing a programming operation in the
Erase Suspend mode, the system may once again read array data with the same exception.
4800 Great America Parkway, Suite 202
11
Santa Clara, CA 95054
Rev 0.4 Release Date: 2002/01/29
Tel: 408-235-8680
Fax: 408-235-8685
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet EN29LV800.PDF ] | |
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