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P5NB80 Schematic ( PDF Datasheet ) - ST Microelectronics

Teilenummer P5NB80
Beschreibung STP5NB80
Hersteller ST Microelectronics
Logo ST Microelectronics Logo 




Gesamt 9 Seiten
P5NB80 Datasheet, Funktion
www.DataSheet4U.com
STP5NB80
® STP5NB80FP
N - CHANNEL 800V - 1.8- 5A - TO-220/TO-220FP
PowerMESHMOSFET
TYPE
VDSS
RDS(on)
ID
ST P5N B80
ST P5N B80 FP
800 V
800 V
< 2.2
< 2.2
5A
5A
s TYPICAL RDS(on) = 1.8
s EXTREMELY HIGH dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s VERY LOW INTRINSIC CAPACITANCES
s GATE CHARGE MINIMIZED
DESCRIPTION
Using the latest high voltage MESH OVERLAY
process, STMicroelectronics has designed an
advanced family of power MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company’s
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SWITCH MODE POWER SUPPLIES (SMPS)
s DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
3
2
1
TO-220
3
2
1
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
S ymb ol
Parameter
VDS Drain-source Voltage (VGS = 0)
V DGR
VGS
ID
ID
IDM()
Ptot
Drain- gat e Voltage (RGS = 20 k)
Gate-source Voltage
Drain Current (cont inuous) at Tc = 25 o C
Drain Current (cont inuous) at Tc = 100 oC
Drain Current (pulsed)
T otal Dissipation at Tc = 25 oC
Derating Factor
dv/dt(1) Peak Diode Recovery voltage slope
VISO Insulation Withstand Voltage (DC)
Ts tg Storage T emperature
Tj Max. Operating Junction T emperature
(*) Limited only by maximum temperature allowed
January 1999
Value
Unit
STP5NB80 STP5NB80FP
800 V
800 V
± 30
V
5 5(*) A
3.2
3.2(*)
A
20 20 A
110
0.88
40
0.32
W
W /o C
4 4 V/ns
2000
V
-65 to 150
oC
150 oC
( 1) ISD 5A, di/dt 200 A/µs, VDD V(BR)DSS, Tj TJMAX
1/9






P5NB80 Datasheet, Funktion
www.DataSheet4U.com
STP5NB80/FP
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/9

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