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Teilenummer | GS74116AGP |
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Beschreibung | 256K X16 4Mb Asynchronous SRAM | |
Hersteller | GSI Technology | |
Logo | ||
Gesamt 16 Seiten SOJ, TSOP, FP-BGA
Commercial Temp
Industrial Temp
256K x 16
4Mb Asynchronous SRAM
GS74116ATP/J/X
8, 10, 12 ns
3.3 V VDD
Center VDD and VSS
Features
• Fast access time: 8, 10, 12 ns
• CMOS low power operation: 130/105/95 mA at minimum
cycle time
• Single 3.3 V power supply
• All inputs and outputs are TTL-compatible
• Byte control
• Fully static operation
• Industrial Temperature Option: –40° to 85°C
• Package line up
J: 400 mil, 44-pin SOJ package
GJ: RoHS-compliant 400 mil, 44-pin SOJ package
TP: 400 mil, 44-pin TSOP Type II package
GP: RoHS-compliant 400 mil, 44-pin TSOP Type II
package
X: 6 mm x 10 mm Fine Pitch Ball Grid Array package
GX: RoHS-compliant 6 mm x 10 mm Fine Pitch Ball Grid
Array package
• RoHS-compliant SOJ, TSOP-II, and FP-BGA packages
available
Description
The GS74116A is a high speed CMOS Static RAM organized
as 262,144 words by 16 bits. Static design eliminates the need
for external clocks or timing strobes. The GS operates on a
single 3.3 V power supply and all inputs and outputs are TTL-
compatible. The GS74116A is available in a 6 x 10 mm Fine
Pitch BGA package, 400 mil SOJ and 400 mil TSOP Type-II
packages.
Pin Descriptions
Symbol
A0–A17
DQ1–DQ16
CE
LB
UB
WE
OE
VDD
VSS
NC
Description
Address input
Data input/output
Chip enable input
Lower byte enable input
(DQ1 to DQ8)
Upper byte enable input
(DQ9 to DQ16)
Write enable input
Output enable input
+3.3 V power supply
Ground
No connect
SOJ 256K x 16-Pin Configuration (Package J)
A4 1
A3 2
A2 3
A1 4
A0 5
Top view
CE 6
DQ1 7
DQ2 8
DQ3 9
DQ4 10
VDD 11
44-pin
VSS 12
DQ5 13
SOJ
DQ6 14
DQ7 15
DQ8 16
WE 17
A15 18
A14 19
A13 20
A12 21
A16 22
44 A5
43 A6
42 A7
41 OE
40 UB
39 LB
38 DQ16
37 DQ15
36 DQ14
35 DQ13
34
33
32
VSS
VDD
DQ12
31 DQ11
30 DQ10
29 DQ9
28 NC
27 A8
26 A9
25 A10
24 A11
23 A17
Rev: 1.07 11/2005
1/16
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, GSI Technology
AC Test Conditions
Parameter
Conditions
Input high level
Input low level
Input rise time
Input fall time
Input reference level
Output reference level
Output load
VIH = 2.4 V
VIL = 0.4 V
tr = 1 V/ns
tf = 1 V/ns
1.4 V
1.4 V
Fig. 1& 2
Notes:
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted.
3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ
GS74116ATP/J/X
Output Load 1
DQ
50Ω 30pF1
VT = 1.4 V
Output Load 2
3.3 V
DQ 589Ω
5pF1 434Ω
Rev: 1.07 11/2005
6/16
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, GSI Technology
6 Page 44 D
23
1
e
y
22
B
GS74116ATP/J/X
44-Pin, 400 mil TSOP-II
c
Detail A
Dimension in inch Dimension in mm
Symbol min nom max min nom max
A — — 0.047 — — 1.20
A1 0.002 — — 0.05 — —
A A2 0.037 0.039 0.041 0.95 1.00 1.05
B 0.01 0.014 0.018 0.25 0.35 0.45
c — 0.006 — — 0.15 —
D 0.721 0.725 0.729 18.31 18.41 18.51
E 0.396 0.400 0.404 10.06 10.16 10.26
e — 0.031 — — 0.80 —
HE 0.455 0.463 0.471 11.56 11.76 11.96
L 0.016 0.020 0.024 0.40 0.50 0.60
L1 — 0.031 — — 0.80 —
y — — 0.004 — — 0.10
Q Q 0o — 5o 0o — 5o
Notes:
1. Dimension D& E do not include interlead flash.
2. Dimension B does not include dambar protrusion/intrusion.
3. Controlling dimension: mm
Rev: 1.07 11/2005
12/16
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, GSI Technology
12 Page | ||
Seiten | Gesamt 16 Seiten | |
PDF Download | [ GS74116AGP Schematic.PDF ] |
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