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PDF WM8522 Data sheet ( Hoja de datos )

Número de pieza WM8522
Descripción 192kHz 6-Channel DAC
Fabricantes Wolfson Microelectronics 
Logotipo Wolfson Microelectronics Logotipo



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WM8522
24-bit, 192kHz 6-Channel DAC with 1.7Vrms Line Driver
DESCRIPTION
The WM8522 is a multi-channel audio DAC ideal for DVD
and surround sound processing applications for home hi-fi,
automotive and other audio visual equipment.
Three stereo 24-bit multi-bit sigma delta DACs are used
with oversampling digital interpolation filters. Digital audio
input word lengths from 16-32 bits and sampling rates from
8kHz to 192kHz are supported.
Each DAC channel has independent digital volume and
mute control, and provides 1.7Vrms line drive capability
from a 5V supply. This makes the device ideal for cost-
sensitive consumer applications requiring high line drive
audio outputs
The audio data interface supports I2S, left justified, right
justified and DSP digital audio formats
The device is controlled via a 3 wire serial interface or
directly using the hardware interface. These interfaces
provide access to features including channel selection,
volume controls, mutes, de-emphasis and power
management facilities. The device is available in a 28-lead
SSOP.
BLOCK DIAGRAM
FEATURES
6-Channel DAC with 1.7Vrms line driver from 5V analogue
supply
Audio performance
SNR 102dB (‘A’ weighted @ 48kHz)
THD -85dB (48kHz)
DAC sampling frequency: 8kHz – 192kHz
3-Wire SPI serial or hardware control interface
Programmable audio data interface modes
I2S, left, right justified or DSP
16/20/24/32 bit word lengths
Three independent stereo DAC outputs with independent
digital volume controls
Master or slave audio data interface
4.5V to 5.5V analogue, 2.7V to 3.6V digital supply
operation
Pin compatible with WM8766
28-lead SSOP package
APPLICATIONS
DVD Players
Surround Sound AV Processors and Hi-Fi systems
Automotive Audio
WOLFSON MICROELECTRONICS plc
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Pre Production, May 2006, 3.1
Copyright 2006 Wolfson Microelectronics plc

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WM8522 pdf
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WM8522
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at
or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical
Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible
to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage
of this device.
Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30°C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
The Moisture Sensitivity Level for each package type is specified in Ordering Information.
CONDITION
MIN MAX
Digital supply voltage
-0.3V
+5V
Analogue supply voltage
-0.3V
+7V
Voltage range digital inputs
DGND -0.3V
DVDD +0.3V
Voltage range analogue inputs
AGND -0.3V
AVDD +0.3V
Master Clock Frequency
38.462MHz
Operating temperature range, TA
Storage temperature after soldering
-25°C
-65°C
+85°C
+150°C
Notes:
1. Analogue and digital grounds must always be within 0.3V of each other for normal operation of the device.
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PP Rev 3.1 May 2006
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INTERNAL POWER ON RESET CIRCUIT
WM8522
Figure 7 Internal Power on Reset Circuit Schematic
The WM8522 includes an internal Power-On-Reset Circuit, as shown in Figure 7, which is used reset
the digital logic into a default state after power up. The POR circuit is powered from DVDD and
monitors DVDD. It asserts PORB low if DVDD is below a minimum threshold.
Figure 8 Typical Power-Up Sequence
Figure 8 shows a typical power-up sequence. When DVDD goes above the minimum threshold,
Vpord, there is enough voltage for the circuit to guarantee PORB is asserted low and the chip is held
in reset. In this condition, all writes to the control interface are ignored. When DVDD rises to
Vpor_on, PORB is released high and all registers are in their default state and writes to the control
interface may take place.
On power down, PORB is asserted low whenever DVDD drops below the minimum threshold
Vpor_off.
SYMBOL
MIN
TYP
MAX
UNIT
Vpord
0.3
0.5
0.8 V
Vpor_on
1.3
1.7
2.0 V
Vpor_off
1.3
1.7
2.0 V
Table 5 Typical POR Operation (typical values, not tested)
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PP Rev 3.1 May 2006
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