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PDF AD73511 Data sheet ( Hoja de datos )
| Número de pieza | AD73511 | |
| Descripción | Low-power CMOS Analog Front End | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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a
Low-Power CMOS Analog Front End
with Flash based DSP Microcomputer
Preliminary Technical Data
AD73511
FEATURES
FUNCTIONAL BLOCK DIAGRAM
AFE PERFORMANCE
16-Bit A/D Converter
16-Bit D/A Converter
POWER-DOWN
CONTROL
Programmable Input/Output Sample Rates
77 dB ADC SNR
77 dB DAC SNR
64 kS/s Maximum Sample Rate
DATA
ADDRESS
GENERATORS
DAG1 DAG2
PROGRAM
SEQUENCER
MEMORY
16K PM 16K DM
(OPTIONAL (OPTIONAL
8K) 8K)
PROGRAM MEMORY ADDRESS
PROGRAMMABLE
I/O
AND
FLAGS
FULL MEMORY
MODE
EXTERNAL
ADDRESS
BUS
–90 dB Crosstalk
Low Group Delay (25 µs typ per ADC Channel,
50 µs typ per DAC Channel)
YProgrammable Input/Output Gain
ROn-Chip Reference
ADSP PERFORMANCE
19 ns Instruction Cycle Time @ 3.3 Volts, 52 MIPS
IN LSustained Performance
AD73511-80
IM A80K Bytes of On-Chip RAM, Configured as 16K Words
L ICProgram Memory RAM and 16K Words
Data Memory RAM
E NAD73511-40
PR H40K Bytes of On-Chip RAM, Configured as 8K Words
C AProgram Memory RAM and 8K Words
E TData Memory RAM
T AFLASH Memory
64 kbytes
DWritable in pages of 128 bytes
DATA MEMORY ADDRESS
PROGRAM MEMORY DATA
DATA MEMORY DATA
ARITHMETIC UNITS
ALU MAC SHIFTER
ADSP-2100 BASE
ARCHITECTURE
REF
SERIAL PORTS
SPORT 0 SPORT 1
SERIAL PORT
SPORT 2
TIMER
ADC
DAC
ANALOG FRONT END
SECTION
EXTERNAL
DATA
BUS
BYTE DMA
CONTROLLER
FLASH
MEMORY
64 KBYTES
The sampling rate of the AFE is programmable with four
Fast Page Write Cycle of 5 ms (typical)
separate settings offering 64, 32, 16 and 8 kHz sampling rates
(from a master clock of 16.384 MHz) while the serial port
(SPORT2) allows easy expansion of the number of I/O
GENERAL DESCRIPTION
channels by cascading extra AFEs external to the AD73511.
The AD73511 is a single-device incorporating a single analog
front end, microcomputer optimized for digital signal
processing (DSP) and a FLASH based boot memory for the
DSP.
The AD73511’s DSP engine combines the ADSP-2100
family base architecture (three computational units, data
address generators and a program sequencer) with two serial
ports, a 16-bit internal DMA port, a byte DMA port, a
The AD73511’s analog front end (AFE) section is suitable
programmable timer, Flag I/O, extensive interrupt capabilities
for general purpose applications including speech and
and on-chip program and data memory.
telephony. The AFE section features a 16-bit A/D converter
and a 16-bit D/A converter. Each converter provides 77 dB
signal-to-noise ratio over a voiceband signal bandwidth.
The AD73511-80 integrates 80K bytes of on-chip memory
configured as 16K words (24-bit) of program RAM, and 16K
words (16-bit) of data RAM. The AD73511-40 integrates
The AD73511 is particularly suitable for a variety of applica- 40K bytes of on-chip memory configured as 8K words (24-
tions in the speech and telephony area including low bit rate, bit) of program RAM, and 8K words (16-bit) of data RAM.
high quality compression, speech enhancement, recognition
Both devices feature a Flash memory array of 64 kbytes (512
and synthesis. The low group delay characteristic of the AFE kbits) connected to the DSP’s byte-wide DMA port
makes it suitable for single or multichannel active control
(BDMA). This allows non-volatile storage of the DSP’s boot
applications. The A/D and D/A conversion channels feature
code and system data parameters. Power-down circuitry is
programmable input/ouput gains with ranges 38 dB and 21 also provided to meet the low power needs of battery
dB respectively. An on-chip reference voltage is included
operated portable equipment. The AD73511 is available in a
to allow single supply operation.
119-ball PBGA package.
REV. PrA 08/99
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1998
1 page  
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Preliminary Technical Data
AD73511
PARAMETER
Min Typ Max Units Test Conditions (STYLE: table col.head)
Total Harmonic Distortion at 0 dBm0
PGA = 0 dB
-80 –70 dB
PGA = 6 dB
-80 dB
Intermodulation Distortion
–85 dB PGA = 0 dB
Idle Channel Noise
–76 dBm0 PGA = 0 dB
Crosstalk
–100
dB ADC Input Level: AGND;
DAC Output Level: 1.0 kHz, 0 dBm0
Power Supply Rejection
–81 dB Input Signal Level at AVDD and DVDD
Pins: 1.0 kHz, 100 mV p-p Sine Wave
Group Delay4, 5
Output DC Offset2, 7
25 µs fSAMP = 64 kHz; Interpolator Bypassed
50 µs fSAMP = 64 kHz
–30 +5 +50 mV PGA = 6 dB
Minimum Load Resistance, RL2, 8
Single-Ended4
150 Ω
Differential
Maximum Load Capacitance, CL2, 8
YSingle-Ended4
RDifferential
ALOGIC INPUTS
VINH, Input High Voltage
IN LVINL, Input Low Voltage
IIH, Input Current
IM ACIN, Input Capacitance
L ICLOGIC OUTPUT
EVOH, Output High Voltage
NVOL, Output Low Voltage
PR HThree-State Leakage Current
C APOWER SUPPLIES
E TAVDD1, AVDD2
T ADVDD
DIDD10
150
DVDD – 0.8
0
-10
DVDD – 0.4
0
–10
3.0
3.0
Ω
500 pF
100 pF
DVDD
0.8
+10
10
V
V
µA
pF
DVDD
0.4
+10
V
V
µA
3.6 V
3.6 V
|IOUT| - 100 µA
|IOUT| - 100 µA
See Table I
NOTES
1 Operating temperature range is as follows: –20°C to +85°C. Therefore, TMIN = –20°C and TMAX = +85°C.
2 Test conditions: Input PGA set for 0 dB gain, Output PGA set for 6 dB gain, no load on analog outputs (unless otherwise noted).
3 At input to sigma-delta modulator of ADC.
4 Guaranteed by design.
5 Overall group delay will be affected by the sample rate and the external digital filtering.
6 The ADC’s input impedance is inversely proportional to DMCLK and is approximated by: (3.3 ∗ 1011)/DMCLK.
7 Between VOUTP1 and VOUTN1 or between VOUTP2 and VOUTN2.
8 At VOUT output.
9 Frequency responses of ADC and DAC measured with input at audio reference level (the input level that produces an output level of –10 dBm0), with 38 dB preamplifier
bypassed and input gain of 0 dB.
10 Test Conditions: no load on digital inputs, analog inputs ac coupled to ground, no load on analog outputs.
Specifications subject to change without notice.
REV. PrA 08/99
–5–
5 Page 
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Preliminary Technical Data
AD73511
PRTEELCIMHDINNAIATCARAYL
REV. PrA 08/99
–11–
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