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A1442 Schematic ( PDF Datasheet ) - Allegro Microsystems

Teilenummer A1442
Beschreibung Low Voltage Full Bridge Brushless DC Motor Driver
Hersteller Allegro Microsystems
Logo Allegro Microsystems Logo 




Gesamt 8 Seiten
A1442 Datasheet, Funktion
www.DataSheet4U.com
A1442
Low Voltage Full Bridge Brushless DC Motor Driver with Hall Commutation and
Soft-Switching, and Reverse Battery, Short Circuit, and Thermal Shutdown Protection
Features and Benefits
Low voltage operation
Reverse voltage protection on VDD and S¯¯L¯¯E¯¯E¯¯P pins
Output short circuit and thermal shutdown protections
Soft switching algorithm to reduce audible switching
noise and EMI interference
Unidirectional working mode provides motor rotation in
one direction
Hall chopper stabilization technique for precise signal
response over operating range
Sleep mode pin allowing external logic signal enable/
disable to reduce average power consumption
Antistall feature guarantees continuous rotation
Low current consumption sleep mode
Single-chip solution for high reliability
Miniature MLP/DFN package
Package: 6 pin MLP/DFN (suffix EW)
1.5 mm × 2 mm, 0.40 mm maximum overall height
Approximate scale
Description
The A1442 is a full-bridge motor driver designed to drive
low-voltage, brushless dc motors. Commutation of the motor
is achieved by use of a single Hall element sensor to detect the
rotational position of an alternating-pole ring magnet. A high-
density CMOS semiconductor process allows the integration
of all the necessary electronics. This includes the Hall element
sensor, the motor control circuitry, and the full output bridge.
Low-voltage design techniques have been employed to achieve
full device functionality down to low VDD values. This fully
integrated single chip solution provides enhanced reliability
(including reverse battery protection and output short circuit
protection) and eliminates the need for any external support
components.
TheA1442 employs a soft-switching algorithm to reduce audible
switching noise and EMI interference. A micropower sleep
mode can be enabled by an external signal, to reduce current
consumption for battery management in portable electronic
devices. This feature allows the removal of a FET transistor
for switching the device on and off.
The A1442 is optimized for vibration motor applications in
cellular phones, pagers, electronic toothbrushes, hand-held
video game controllers, and low power fan motors.
The small package outline and low profile make this device
ideally suited for use in applications where printed circuit board
area and component headroom are at a premium. It is available
in a lead (Pb) free, 6 pin MLP/DFN microleadframe package,
with an exposed pad for enhanced thermal dissipation.
Functional Block Diagram
VDD
SLEEP
0.1 μF
Reverse Battery
Power and Sleep
Mode Control
Active Braking
Control
Hall
Element
Stall Detection
Amp
Drive Logic
and
Soft Start
Control
Thermal Shutdown
Protection
Output
Full Bridge
Q1
Q3
Q2
Q4
GND
A1442-DSS
VOUT1
VOUT2
M






A1442 Datasheet, Funktion
www.DataSheet4U.com
A1442
Low Voltage Full Bridge Brushless DC Motor Driver
with Hall Commutation and Soft-Switching,
and Reverse Battery, Short Circuit, and Thermal Shutdown Protection
Power Derating
The device must be operated below the maximum junction tem-
perature of the device, TJ(max). Under certain combinations of
peak conditions, reliable operation may require derating supplied
power or improving the heat dissipation properties of the appli-
cation. This section presents a procedure for correlating factors
affecting operating TJ. (Thermal data is also available on the
Allegro MicroSystems Web site.) The package thermal resistance,
RθJA, is a figure of merit summarizing the ability of the appli-
cation and the device to dissipate heat from the junction (die),
through all paths to the ambient air. Its primary component is the
effective thermal conductivity, K, of the printed circuit board,
including adjacent devices and traces. Radiation from the die
through the device case, RθJC, is relatively small component of
RθJA. Ambient air temperature, TA, and air motion are significant
external factors, damped by overmolding. The effect of varying
power levels (power dissipation, PD) can be estimated. The fol-
lowing formulas represent the fundamental relationships used to
estimate TJ at given levels of PD.
Given:
PD = VIN × IIN ,
(1)
ΔT = PD × RθJA , and
(2)
TJ = TA + ΔT
(3)
For a load of 30 Ω, given common conditions such as: TA= 25°C,
VDD = 3 V, IDD = 83 mA, VL = 2.43 V, IL = 81 mA and RθJA =
250 °C/W, then:
PD = VDD × IDD VLIL
= 3 V × 83 mA – 2.43 V × 81 mA = 52.17 mW ,
ΔT = PD × RθJA
= 52.17 mW × 250 °C/W = 13°C , and
TJ = TA + ΔT = 25°C + 13°C = 38°C
A worst-case estimate, PD(max), represents the maximum allow-
able power level, without exceeding TJ(max), at a selected RθJA
and TA.
VBATT
System Logic
Control
I/O
IDD
CBYP
0.1 μF
VDD
A1442
SLEEP
VOUT1
VOUT2
NC GND
IL
M
Figure 4. Typical application showing current paths
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6

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