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PDF GS74116TU Data sheet ( Hoja de datos )

Número de pieza GS74116TU
Descripción 256K x 16 4Mb Asynchronous SRAM
Fabricantes GSI Technology 
Logotipo GSI Technology Logotipo



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No Preview Available ! GS74116TU Hoja de datos, Descripción, Manual

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SOJ, TSOP, FP-BGA
Commercial Temp
Industrial Temp
256K x 16
4Mb Asynchronous SRAM
GS74116TP/J/U
8, 10, 12, 15ns
3.3V VDD
Center VDD & VSS
Features
• Fast access time: 8, 10, 12, 15ns
• CMOS low power operation: 170/145/130/110 mA at min.cycle time.
• Single 3.3V ± 0.3V power supply
• All inputs and outputs are TTL compatible
• Byte control
• Fully static operation
• Industrial Temperature Option: -40° to 85°C
• Package line up
J: 400mil, 44 pin SOJ package
TP: 400mil, 44 pin TSOP Type II package
U: 7.20mm x 11.65mm Fine Pitch Ball Grid Array package
Description
The GS74116 is a high speed CMOS static RAM organized as
262,144-words by 16-bits. Static design eliminates the need for exter-
nal clocks or timing strobes. Operating on a single 3.3V power supply
and all inputs and outputs are TTL compatible. The GS74116 is avail-
able in a 7.2x11.65 mm Fine Pitch BGA package, 400 mil SOJ and
400 mil TSOP Type-II packages.
Pin Descriptions
Symbol
A0 to A17
DQ1 to DQ16
CE
LB
UB
WE
OE
VDD
VSS
NC
Description
Address input
Data input/output
Chip enable input
Lower byte enable input
(DQ1 to DQ8)
Upper byte enable input
(DQ9 to DQ16)
Write enable input
Output enable input
+3.3V power supply
Ground
No connect
SOJ 256K x 16 Pin Configuration
A4 1
A3 2
A2 3
A1 4
A0 5
CE 6
Top view
DQ1 7
DQ2 8
DQ3 9
DQ4 10
VDD 11
44 pin
VSS 12
DQ5 13
SOJ
DQ6 14
DQ7 15
DQ8 16
WE 17
A15 18
A14 19
A13 20
A12 21
A16 22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
DQ16
DQ15
DQ14
DQ13
VSS
VDD
DQ12
DQ11
DQ10
DQ9
NC
A8
A9
A10
A11
A17
Fine Pitch BGA 256K x 16 Bump Configuration
123456
A LB OE A0 A1 A2 NC
B DQ16 UB A3 A4 CE DQ1
C DQ14 DQ15 A5 A6 DQ2 DQ3
D VSS DQ13 A17 A7 DQ4 VDD
E VDD DQ12 NC A16 DQ5 VSS
F DQ11 DQ10 A8 A9 DQ7 DQ6
G DQ9 NC A10 A11 WE DQ8
H NC A12 A13 A14 A15 NC
7.2x11.65mm 0.75mm Bump Pitch
Top View
Rev: 2.02 3/2000
1/14
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, Giga Semiconductor, Inc.
N

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GS74116TU pdf
GS74116TP/J/U
Power Supply Currents
Parameter Symbol Test Conditions
0 to 70°C
-40 to 85°C
8ns 10ns 12ns 15ns 10ns 12ns 15ns
Operating
Supply
Current
IDD
Standby
Current
ISB1
CE VIL
All other inputs
VIH or VIL
Min. cycle time
IOUT = 0 mA
CE VIH
All other inputs
VIH or VIL
Min. cycle time
170mA 145mA 130mA 110mA 155mA 140mA 120mA
70mA 65mA 60mA 55mA 75mA 70mA 65mA
Standby
Current
CE VDD - 0.2V
ISB2 All other inputs
VDD - 0.2V or 0.2V
30mA
40mA
AC Test Conditions
Parameter
Conditions
Input high level
Input low level
Input rise time
VIH=2.4V
VIL=0.4V
tr=1V/ns
Input fall time
Input reference level
Output reference level
tf=1V/ns
1.4V
1.4V
Output load
Fig. 1& 2
Note:
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted
3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ.
Output Load 1
DQ
5030pF1
VT=1.4V
Output Load 2
3.3V
DQ 589
5pF1 434
Rev: 2.02 3/2000
5/14
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, Giga Semiconductor, Inc.
N

5 Page





GS74116TU arduino
44 Pin, 400 mil TSOP-II
44 D
23
1
e
y
22
B
GS74116TP/J/U
Dimension in inch Dimension in mm
c Symbol min nom max min nom max
A - - 0.047 - - 1.20
A1 0.002 -
- 0.05 -
-
A A2 0.037 0.039 0.041 0.95 1.00 1.05
B 0.01 0.014 0.018 0.25 0.35 0.45
c
- 0.006 -
- 0.15 -
D 0.721 0.725 0.729 18.31 18.41 18.51
E 0.396 0.400 0.404 10.06 10.16 10.26
e
- 0.031 -
- 0.80 -
HE 0.455 0.463 0.471 11.56 11.76 11.96
L 0.016 0.020 0.024 0.40 0.50 0.60
L1
- 0.031 -
- 0.80 -
y - - 0.004 - - 0.10
Q
Detail A
Q 0o - 5o 0o - 5o
Note:
1. Dimension D& E do not include interlead flash
2. Dimension B does not include dambar protrusion / intrusion
3. Controlling dimension: mm
Rev: 2.02 3/2000
11/14
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, Giga Semiconductor, Inc.
N

11 Page







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