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GS74108J Schematic ( PDF Datasheet ) - GSI Technology

Teilenummer GS74108J
Beschreibung 512K x 8 4Mb Asynchronous SRAM
Hersteller GSI Technology
Logo GSI Technology Logo 




Gesamt 12 Seiten
GS74108J Datasheet, Funktion
www.DataSheet4U.com
SOJ, TSOP
Commercial Temp
Industrial Temp
512K x 8
4Mb Asynchronous SRAM
GS74108TP/J
8, 10, 12, 15ns
3.3V VDD
Center VDD & VSS
Features
• Fast access time: 8, 10, 12, 15ns
• CMOS low power operation: 150/125/110/90 mA at min. cycle time.
• Single 3.3V ± 0.3V power supply
• All inputs and outputs are TTL compatible
• Fully static operation
• Industrial Temperature Option: -40° to 85°C
• Package line up
J: 400mil, 36 pin SOJ package
TP: 400mil, 44 pin TSOP Type II package
Description
The GS74108 is a high speed CMOS static RAM organized as
524,288-words by 8-bits. Static design eliminates the need for exter-
nal clocks or timing strobes. Operating on a single 3.3V power supply
and all inputs and outputs are TTL compatible. The GS74108 is avail-
able in 400 mil SOJ and 400 mil TSOP Type-II packages.
Pin Descriptions
Symbol
A0 to A18
DQ1 to DQ8
CE
WE
OE
VDD
VSS
NC
Description
Address input
Data input/output
Chip enable input
Write enable input
Output enable input
+3.3V power supply
Ground
No connect
SOJ 512K x 8 Pin Configuration
A4 1
A3 2
A2 3
A1 4
A0 5
CE 6
DQ1 7
DQ2 8
VDD 9
VSS 10
DQ3 11
DQ4 12
WE 13
A17 14
A16 15
A15 16
A14 17
A13 18
36 pin
400mil SOJ
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
A5
A6
A7
A8
OE
DQ8
DQ7
VSS
VDD
DQ6
DQ5
A9
A10
A11
A12
A18
NC
Rev: 1.06 7/2000
1/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, Giga Semiconductor, Inc.






GS74108J Datasheet, Funktion
AC Characteristics
GS74108TP/J
Read Cycle
Parameter
Symbol
Read cycle time
tRC
Address access time
tAA
Chip enable access time (CE)
tAC
Output enable to output valid (OE)
tOE
Output hold from address change
tOH
Chip enable to output in low Z (CE)
tLZ*
Output enable to output in low Z (OE)
tOLZ*
Chip disable to output in High Z (CE)
tHZ*
Output disable to output in High Z (OE)
tOHZ*
* These parameters are sampled and are not 100% tested
-8
Min Max
8 ---
--- 8
--- 8
--- 3.5
3 ---
3 ---
0 ---
--- 4
--- 3.5
-10
Min Max
10 ---
--- 10
--- 10
--- 4
3 ---
3 ---
0 ---
--- 5
--- 4
-12
Min Max
12 ---
--- 12
--- 12
--- 5
3 ---
3 ---
0 ---
--- 6
--- 5
-15
Min Max
15 ---
--- 15
--- 15
--- 6
3 ---
3 ---
0 ---
--- 7
--- 6
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Read Cycle 1: CE = OE = VIL, WE = VIH
Address
Data Out
tOH
Previous Data
tRC
tAA
Data valid
Rev: 1.06 7/2000
6/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, Giga Semiconductor, Inc.

6 Page









GS74108J pdf, datenblatt
Revision History
GS74108TP/J
Rev. Code: Old;
New
741081.04d 5/1999/741081.05 1/
2000
Types of Changes
Format or Content
Page #/Revisions/Reason
Content
1. Page 2/Pins 16 - 20 and 26 - 30 on 44 pin TSOP II Pin Configuration/
Correction.
GS74108Rev1.05 10/19991/
2000K;Rev 5 2/2000L
Format/Content
1. GSI Logo
2.
Rev: 1.06 7/2000
12/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, Giga Semiconductor, Inc.

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