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DS26324 Schematic ( PDF Datasheet ) - Dallas Semiconductor

Teilenummer DS26324
Beschreibung E1/T1/J1 Short-Haul Line Interface Unit
Hersteller Dallas Semiconductor
Logo Dallas Semiconductor Logo 




Gesamt 30 Seiten
DS26324 Datasheet, Funktion
www.DataSheet4U.com
www.maxim-ic.com
DS26324
3.3V, 16-Channel, E1/T1/J1
Short-Haul Line Interface Unit
GENERAL DESCRIPTION
The DS26324 is a 16-channel short-haul line
interface unit (LIU) that supports E1/T1/J1 from a
single 3.3V power supply. A wide variety of
applications are supported through internal
impedance matching. A single bill of material can
support E1/T1/J1 that requires no external
termination. Redundancy is supported through
nonintrusive monitoring, optimal high-impedance
modes and configurable 1:1 or 1+1 backup
enhancements. An on-chip synthesizer generates the
E1/T1/J1 clock rates by a single master clock input of
various frequencies. Two clock output references are
also offered. The device is offered in a 256-pin
TE-CSBGA, the smallest package available for a
16-channel LIU.
APPLICATIONS
T1 Digital Cross-Connects
ATM and Frame Relay Equipment
Wireless Base Stations
ISDN Primary Rate Interface
E1/T1/J1 Multiplexer and Channel Banks
E1/T1/J1 LAN/WAN Routers
FUNCTIONAL DIAGRAM
JTAG
SOFTWARE CONTROL
AND JTAG
LOSS
RTIP
RRING
TTIP
TRING
RECEIVER
TRANSMITTER
1
RPOS
RNEG
RCLK
TPOS
TNEG
TCLK
16
FEATURES
16 E1, T1, or J1 Short-Haul Line Interface
Units
Independent E1, T1 or J1 Selections
Fully Internal Impedance Match Requires No
External Resistors
Software-Selectable Transmit and Receive-
Side Impedance Match
Crystal-Less Jitter Attenuator
Selectable Single-Rail and Dual-Rail Mode
and AMI or HDB3/B8ZS Line Encoding and
Decoding
Detection and Generation of AIS
Digital/Analog Loss of Signal Detection as
per T1.231, G.775 and ETS 300 233
External Master Clock Can Be Multiple of
2.048MHz or 1.544MHz for T1/J1 or E1
Operation; This Clock Will Be Internally
Adapted for T1 or E1 Usage
Receiver Signal Level Indicator from -2.5dB to
-20dB in 2.5dB Increments
Two Built-In BERT Testers for Diagnostics
8-Bit Parallel Interface Support for Intel or
Motorola Mode or a 4-Wire Serial Interface
Transmit Short-Circuit Protection
G.772 Nonintrusive Monitoring
Receive Monitor Mode Handles Combinations
of 14dB to 20dB of Resistive Attenuation
Along with 12dB to 30dB of Cable Attenuation
Specification Compliance to the Latest T1
and E1 Standards—ANSI T1.102, AT&T Pub
62411, T1.231, T1.403, ITU-T G.703, G.742,
G.775, G.823, ETS 300 166, and ETS 300 233
Single 3.3V Supply with 5V Tolerant I/O
JTAG Boundary Scan as Per IEEE 1149.1
ORDERING INFORMATION
PART
DS26324G
DS26324GN
TEMP RANGE PIN-PACKAGE
0°C to +70°C 256 TE-CSBGA
-40°C to +85°C 256 TE-CSBGA
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
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DS26324 Datasheet, Funktion
DS26324 3.3V, 16-Channel, E1/T1/J1 Short-Haul Line Interface Unit
1 STANDARDS COMPLIANCE
1.1 Telecom Specifications compliance
The DS26324 LIU meets all the relevant latest Telecommunications Specifications. The following provides the T1
and E1 Specifications and relevant sections that are applicable to the DS26324.
T1-Related Telecommunications Specifications
ANSI T1.102: Digital Hierarchy Electrical Interface
ANSI T1.231: Digital Hierarchy- Layer 1 in Service Performance Monitoring
ANSI T1.403: Network and Customer Installation Interface- DS1 Electrical Interface
G.736: Characteristics of a synchronous digital multiplex equipment operating at 2048kbps
G.823: The control of jitter and wander within digital networks which are based on the 2048kbps hierarchy
Pub 62411: High Capacity Terrestrial Digital Service
ITU-T G.772: Protected monitoring points provided on digital transmission systems
E1-Related Telecommunications Specifications
ITU-T G.703: Physical/Electrical Characteristics of G.703 Hierarchical Digital Interfaces
ITU-T G.736: Characteristics of Synchronous Digital Multiplex Equipment operating at 2048kbps
ITU-T G.742: Second Order Digital Multiplex Equipment Operating at 8448kbps
ITU-T G.772: Protected monitoring points provided on digital transmission systems
ITU-T G.775: Loss of signal (LOS) and alarm indication signal (AIS) defect detection and clearance criteria
ETS 300 166: Physical and electrical characteristics of hierarchical digital interfaces for equipment using
the 2048kbps-based plesiosynchronous or synchronous digital hierarchies
ETS 300 233: Integrated Services Digital Network (ISDN)
G.736: Characteristics of a synchronous digital multiplex equipment operating at 2048kbps
G.823: The control of jitter and wander within digital networks which are based on the 2048kbps hierarchy
Pub 62411: High Capacity Terrestrial Digital Service
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DS26324 pdf, datenblatt
DS26324 3.3V, 16-Channel, E1/T1/J1 Short-Haul Line Interface Unit
NAME
PIN TYPE
FUNCTION
TCLK1
F5
TCLK2
TCLK3
TCLK4
TCLK5
TCLK6
G4
G9
H6
M7
L8
Transmit Clock for Channels 1–16. The transmit clock has to be
1.544MHz for T1 or 2.048MHz for E1 mode. TCLKn is the clock used
to sample the data TPOS/TNEG or TDAT on the falling edge. The
expected TCLK can be inverted.
TCLK7
L10
If TCLKn is ‘high’ for 16 or more MCLKs, then transmit all ones
TCLK8
TCLK9
P9
K11
I
(TAOs) is sent to the line side of the corresponding transmit channel.
When TCLKn starts clocking again, normal operation will begin again
TCLK10
K12
for the corresponding transmit channel.
TCLK11
TCLK12
TCLK13
TCLK14
F14
E12
C11
D12
If TCLKn is ‘low’ for 64 or more MCLKs, then the corresponding
transmit channel on the line side will power-down and be put into high
impedance. When TCLKn starts clocking again the corresponding
transmit channel will power-up and come out of high impedance.
TCLK15
N7
TCLK16
D11
RPOS1/RDATA1
F4
RPOS2/RDATA2
F3
RPOS3/RDATA3
L3
Receive Positive Data Output for Channels 1–16. In dual-rail mode
RPOS4/RDATA4
RPOS5/RDATA5
RPOS6/RDATA6
RPOS7/RDATA7
L4
K8
M9
P8
the NRZ data output indicates a positive pulse on RTIP/RRING. Upon
detecting an LOS, AIS can be inserted if the AISEL bit in the GC
(0Fh) register is set; otherwise, the pins will be active. AIS insertion
can also be controlled on an individual LIU basis by the IAISEL (05h)
register. If a given receiver is in power-down mode, the associated
RPOS8/RDATA8 M12
O, RPOS pin is high impedance.
RPOS9/RDATA9 M14 tri-state
RPOS10/RDATA10 K13
Receive Data Output for Channels 1–16. In single-rail mode, NRZ
RPOS11/RDATA11 G12
data is sent out on this pin. If a given receiver is in power-down mode,
RPOS12/RDATA12 E14
the associated RPOS pin is high impedance.
RPOS13/RDATA13 C12
RPOS14/RDATA14 C10
Note: During an LOS condition, the RPOS/RDATA outputs remain
active.
RPOS15/RDATA15 C8
RPOS16/RDATA16 E5
RNEG1/CV1
E3
RNEG2/CV2
G5
RNEG3/CV3
K4
Receive Negative Data Output for Channels 1–16. In dual-rail
RNEG4/CV4
M3
mode the NRZ data output indicates a negative pulse on
RNEG5/CV5
L7
RTIP/RRING. Upon detecting a LOS, AIS can be inserted if AISEL bit
RNEG6/CV6
RNEG7/CV7
RNEG8/CV8
RNEG9/CV9
M10
P11
K10
M13
O,
tri-state
in the GC register is set; otherwise, the pins will be active. AIS
insertion can also be controlled on an individual LIU basis by IAISEL
register. If a given receiver is in power-down mode, the associated
RNEG pin is high impedance.
RNEG10/CV10
RNEG11/CV11
L14
F13
Code Violation for Channels 1–16. In single-rail mode, bipolar
violation, code violation, and excessive zeros are reported on CVn. If
RNEG12/CV12
F11
HDB3 or B8ZS is not selected, this pin indicates only BPVs. If a given
RNEG13/CV13
E10
receiver is in power-down mode, the associated CV pin is high
RNEG14/CV14
C9
impedance.
RNEG15/CV15
C7
RNEG16/CV16
J3
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