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PDF ADL5534 Data sheet ( Hoja de datos )
| Número de pieza | ADL5534 | |
| Descripción | IF Gain Blocks | |
| Fabricantes | Analog Devices | |
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Preliminary Technical Data
FEATURES
Fixed gain of 20 dB
Operation up to 500 MHz
+41.8 dBm OIP3 at 70 MHz
Noise Figure 2.5 dB at 70 MHz
Temperature and power supply stable
Power supply: 5 V
Power supply current: 90 mA per amplifier
1000 V ESD (Class 1C)
20 MHz to 500 MHz
IF Gain Block
ADL5534
FUNCTIONAL BLOCK DIAGRAM
RFIN1 1
NC 2
RFIN2 3
NC 4
ADL5534
12 RFOUT1
11 CLIN1
10 RFOUT2
9 CLIN2
GENERAL DESCRIPTION
The ADL5534 contains two broadband, fixed-gain, linear
amplifiers in an 4x4 mm LFCSP package and operates at
frequencies up to 500 MHz. The device can be used in a wide
variety of wired and wireless devices including cellular, GSM
and WCDMA, and broadband applications.
The ADL5534 has a fixed gain 20 dB and is stable over
frequency, temperature, power supply and from device to
device. It achieves an OIP3 of 41.8 dBm with an output
compression point of +20.2 dBm and a noise figure of 2.5 dB.
The ADL5534 is single-ended and internally matched to 50 Ω
with an input return loss of 10 dB. Only input/output ac-
Figure 1. Block Diagram
coupling capacitors, a power supply decoupling capacitor and
external inductor are required for operation.
This IF amplifier operates with supply voltage of +5V,
consuming 90 mA of supply current per amplifier.
Fabricated on a GaAs HBT process and has an ESD rating of
1000 V (Class 1C). The device is packaged in a 4mm x 4mm
LFCSP that uses an exposed paddle for excellent thermal
impedance and operates from −40°C to +85°C. A fully
populated evaluation board is available.
Rev. PrD 5/07
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.
1 page  
Preliminary Technical Data
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
RFIN1 1
NC 2
RFIN2 3
NC 4
PIN 1
INDICATOR
ADL5534
TOP VIEW
(Not to Scale)
12 RFOUT1
11 CLIN1
10 RFOUT2
9 CLIN2
ADL5534
Figure 2.
Table 3. Pin Function Descriptions
Pin No.
Mnemonic Description
1, 3 RFIN1, RFIN2 RF Input: Requires a DC blocking capacitor. Use a 10 nF capacitor for normal operation.
10, 12
RFOUT1,
RFOUT2
RF Output and Bias: DC bias is provided to this pin through an inductor. A 470 nH inductor is recommended
for normal operation. RF path requires a DC blocking capacitor. Use a 10 nF capacitor for normal operation.
5, 6, 7,8,
GND
13,14,15,16
Ground. Connect this pin to a low impedance ground plane.
2, 4 NC
No Connect.
9, 11 CLIN1, CLIN2 A 1 nF capacitor connected between 9 and ground an Pin11 and ground provides decoupling for the on
board linearizer.
Exposed
Paddle
Internally connected to GND. Solder to a low impedance ground plane
Rev. PrD 5/07 | Page 5 of 9
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet ADL5534.PDF ] | |
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