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33984B Schematic ( PDF Datasheet ) - Freescale Semiconductor

Teilenummer 33984B
Beschreibung Dual Intelligent High-Current Self Protected Silicon High-Side Switch
Hersteller Freescale Semiconductor
Logo Freescale Semiconductor Logo 




Gesamt 30 Seiten
33984B Datasheet, Funktion
www.DFaretaeSshceeatl4eUS.ceommiconductor
Advance Information
Document Number: MC33984
Rev. 9.0, 1/2007
Dual Intelligent High-Current
Self-Protected Silicon
High-Side Switch (4.0 mΩ)
33984B
The 33984 is a dual self-protected 4.0 msilicon switch used to
replace electromechanical relays, fuses, and discrete devices in
power management applications. The 33984 is designed for harsh
environments, and it includes self-recovery features. The device is
suitable for loads with high inrush current, as well as motors and all
types of resistive and inductive loads.
Programming, control, and diagnostics are implemented via the
Serial Peripheral Interface (SPI). A dedicated parallel input is
available for alternate and pulse-width modulation (PWM) control of
each output. SPI-programmable fault trip thresholds allow the device
to be adjusted for optimal performance in the application.
The 33984 is packaged in a power-enhanced 12 x 12 nonleaded
PQFN package with exposed tabs.
Features
• Dual 4.0 mMax High-Side Switch with Parallel Input or SPI
Control
• 6.0 V to 27 V Operating Voltage with Standby Currents < 5.0 µA
• Output Current Monitoring with Two SPI-Selectable Current Ratios
• SPI Control of Overcurrent Limit, Overcurrent Fault Blanking Time,
Output-OFF Open Load Detection, Output ON/OFF Control,
Watchdog Timeout, Slew Rates, and Fault Status Reporting
• SPI Status Reporting of Overcurrent, Open and Shorted Loads,
Overtemperature, Undervoltage and Overvoltage Shutdown, Fail-
Safe Pin Status, and Program Status
• Enhanced -16 V Reverse Polarity VPWR Protection
HIGH-SIDE SWITCH
BOTTOM VIEW
PNA SUFFIX
98ARL10521D
16-PIN PQFN
ORDERING INFORMATION
Device
Temperature
Range (TA)
Package
MC33984BPNA/R2 -40°C to 125°C
16 PQFN
VDD
VDD
I/O
I/O
SO
SCLK
MCU CS
SI
I/O
I/O
I/O
A/D
VDD
VPWR
33984B
VDD
VPWR
FS
WAKE
SI
SCLK
CS
SO
RST
INO
IN1
CSNS
FSI
HS1
HS0
GND
GND
LOAD
LOAD
Figure 1. 33984 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2007. All rights reserved.






33984B Datasheet, Funktion
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted.
Rating
Symbol
Value
Unit
THERMAL RATINGS
Operating Temperature
Ambient
Junction
Storage Temperature
Thermal Resistance (5)
Junction-to-Case
Junction-to-Ambient
Peak Package Reflow Temperature During Reflow (6), (7)
TA
TJ
TSTG
RθJC
RθJA
TPPRT
-40 to 125
-40 to 150
-55 to 150
<1.0
20
Note 7
°C
°C
°C/W
°C
Notes
5. Device mounted on a 2s2p test board according to JEDEC JESD51-2.
6. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
7. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL),
Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e.
MC33xxxD enter 33xxx), and review parametrics.
33984
6
Analog Integrated Circuit Device Data
Freescale Semiconductor

6 Page









33984B pdf, datenblatt
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics (continued)
Characteristics noted under conditions 4.5 V VDD 5.5 V, 6.0 V VPWR 27 V, -40°C TA 125°C unless otherwise noted.
Typical values noted reflect the approximate parameter mean at TA = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min Typ Max Unit
POWER OUTPUT TIMING (CONTINUED)
Overcurrent Detection Blanking Time (OCLT[1:0])
00
01
10
11
t OCL0
t OCL1
t OCL2
t OCL3
ms
108 155 202
7.0 10 13
0.8 1.2 1.6
0.08 0.15 0.25
Overcurrent High Detection Blanking Time
CS to CSNS Valid Time (22)
t OCH
1.0 10 20 µs
t CNSVAL
– 10 µs
HS0 Switching Delay Time (OSD[2:0])
000
001
010
011
100
101
110
111
t OSD0
t OSD1
t OSD2
t OSD3
t OSD4
t OSD5
t OSD6
t OSD7
ms
–0–
55 75 95
110 150 190
165 225 285
220 300 380
275 375 475
330 450 570
385 525 665
HS1 Switching Delay Time (OSD[2:0])
000
001
010
011
100
101
110
111
Watchdog Timeout (WD[1:0]) (23)
00
01
10
11
t OSD0
t OSD1
t OSD2
t OSD3
t OSD4
t OSD5
t OSD6
t OSD7
t WDTO0
t WDTO1
t WDTO2
t WDTO3
110
110
220
220
330
330
434
207
1750
875
0
0
150
150
300
300
450
450
620
310
2500
1250
190
190
380
380
570
570
806
403
3250
1625
ms
ms
Notes
22. Time necessary for the CSNS to be within ±5% of the targeted value.
23. Watchdog timeout delay measured from the rising edge of WAKE to RST from a sleep state condition to output turn-ON with the output
driven OFF and FSI floating. The values shown are for WDR setting of [00]. The accuracy of tWDTO is consistent for all configured
watchdog time-outs.
33984
12
Analog Integrated Circuit Device Data
Freescale Semiconductor

12 Page





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