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PDF 33972 Data sheet ( Hoja de datos )
| Número de pieza | 33972 | |
| Descripción | Multiple Switch Detection Interface | |
| Fabricantes | Freescale Semiconductor | |
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Advance Information
Document Number: MC33972
Rev. 9.0, 4/2007
Multiple Switch Detection
Interface with Suppressed
Wake-Up
33972
33972A
The 33972 Multiple Switch Detection Interface with Suppressed
Wake-Up is designed to detect the closing and opening of up to 22
switch contacts. The switch status, either open or closed, is transferred
to the microprocessor unit (MCU) through a serial peripheral interface
(SPI). The device also features a 22-to-1 analog multiplexer for reading
inputs as analog. The analog input signal is buffered and provided on
the AMUX output pin for the MCU to read.
The 33972 device has two modes of operation, Normal and Sleep.
Normal mode allows programming of the device and supplies switch
contacts with pullup or pulldown current as it monitors switch change
of state. The Sleep mode provides low quiescent current, which makes
the 33972 ideal for automotive and industrial products requiring low
sleep state currents.
Features
• Designed to Operate 5.5 V ≤ VPWR ≤ 26 V
• Switch Input Voltage Range -14 V to VPWR, 40 V Max
• Interfaces Directly to MPU using 3.3 V/5.0 V SPI Protocol
• Selectable Wake-Up on Change of State
• Selectable Wetting Current (16 mA or 2.0 mA)
• 8 Programmable Inputs (Switches to Battery or Ground)
• 14 Switch-to-Ground Inputs
• Typical Standby Current - VPWR = 100 µA and VDD = 20 µA
• Active Interrupt (INT) on Change-of-Switch State
• Pb-Free Packaging Designated by Suffix Code EW
MULTIPLE SWITCH
DETECTION INTERFACE
DWB SUFFIX
EW SUFFIX (Pb-FREE)
98ARH99137A
32-PIN SOICW
ORDERING INFORMATION
Device
Temperature
Range (TA)
Package
MC33972DWB/R2
MC33972EW/R2
-40°C to 125°C
32 SOICW
MCZ33972AEW/R2
VDD
VBAT
VBAT
VBAT
33972
SP0 VPWR
SP1
VDD
SP7
SG0
SG1
SG12
WAKE
SI
SCLK
CS
SO
INT
AMUX
Power Supply
LVI
Enable
VDD Watchdog
Reset
MCU
MOSI
SCLK
CS
MISO
INT
AN0
SG13
GND
Figure 1. 33972 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2007. All rights reserved.
1 page  
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 3. Maximum Ratings
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Ratings
Symbol
Value
Unit
ELECTRICAL RATINGS
VDD Supply Voltage
CS, SI, SO, SCLK, INT, AMUX (1)
WAKE (1)
VPWR Supply Voltage (1)
VPWR Supply Voltage at -40C(1)
Switch Input Voltage Range
Frequency of SPI Operation (VDD = 5.0 V)
ESD Voltage (3)
Human Body Model (2)
Applies to all non-input pins
Machine Model
Charge Device Model
Corner Pins
Interior Pins
–
–
–
–
–
–
VESD
-0.3 to 7.0
-0.3 to 40
-0.3 to 50
-0.3 to 45
-14 to 40
6.0
±2000
±2000
±200
750
500
VDC
VDC
VDC
VDC
VDC
MHz
V
THERMAL RATINGS
Operating Temperature
Ambient
Junction
Case
Storage Temperature
Power Dissipation (TA = 25°C) (4)
Thermal Resistance
Junction to Ambient
Junction to Lead
Peak Package Reflow Temperature During Reflow (5), (6)
TA
TJ
TC
TSTG
PD
RθJA
RθJL
TPPRT
-40 to 125
-40 to 150
-40 to 125
-55 to 150
1.7
74
25
Note 6.
°C
°C
W
°C/W
°C
Notes
1. Exceeding these limits may cause malfunction or permanent damage to the device.
2. ESD data available upon request.
3. ESD1 testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 Ω), and ESD2 testing is performed
in accordance with the Machine Model (CZAP = 200 pF, RZAP = 0 Ω).
4. Maximum power dissipation at TJ = 150°C junction temperature with no heat sink used.
5. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
6. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL),
Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e.
MC33xxxD enter 33xxx), and review parametrics.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33972
5
5 Page 
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
WAKE-UP (WAKE)
The WAKE pin is an open-drain output and a wake-up
input. The pin is designed to control a power supply Enable
pin. In the Normal mode, the WAKE pin is LOW. In the Sleep
mode, the WAKE pin is HIGH. The WAKE pin has a pullup to
the internal +5.0 V supply.
In Sleep mode with the WAKE pin HIGH, falling edge of
WAKE will place the 33972 in Normal mode. In Sleep mode
with VDD applied, the INT pin must be HIGH for negative edge
of WAKE to wake up the device. If VDD is not applied to the
device in Sleep mode, INT does not affect WAKE operation.
BATTERY INPUT (VPWR)
The VPWR pin is battery input and Power-ON Reset to the
33972 IC. The VPWR pin requires external reverse battery
and transient protection. Maximum input voltage on VPWR is
50 V. All wetting, sustain, and internal logic current is
provided from the VPWR pin.
VOLTAGE DRAIN SUPPLY (VDD)
The VDD input pin is used to determine logic levels on the
microprocessor interface (SPI) pins. Current from VDD is
used to drive SO output and the pullup current for CS and INT
pins. VDD must be applied for wake-up from negative edge of
CS or INT.
GROUND (GND)
The GND pin provides ground for the IC as well as ground
for inputs programmed as switch-to-battery inputs.
PROGRAMMABLE SWITCHES (SP0:SP7)
The 33972 device has 8 switch inputs capable of being
programmed to read switch-to-ground or switch-to-battery
contacts. The input is compared with a 4.0 V reference.
When programmed to be switch-to-battery, voltages greater
than 4.0 V are considered closed. Voltages less than 4.0 V
are considered open. The opposite holds true when inputs
are programmed as switch-to-ground. Programming features
are defined in Table 6 through Table 11 in the functional
Device Operation section of this datasheet beginning on
page 12. Voltages greater than the VPWR supply voltage will
source current through the SP inputs to the VPWR pin.
Transient battery voltages greater than 38/40 V must be
clamped by an external device.
SWITCH-TO-GROUND INPUTS (SG0:SG13)
The SGn pins are switch-to-ground inputs only. The input
is compared with a 4.0 V reference. Voltages greater than
4.0 V are considered open. Voltages less than 4.0 V are
considered closed. Programming features are defined in
Table 6 through Table 11 in the functional Device Operation
section of this datasheet beginning on page 12. Voltages
greater than the VPWR supply voltage will source current
through the SG inputs to the VPWR pin. Transient battery
voltages greater than 40 V must be clamped by an external
device.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33972
11
11 Page | ||
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| PDF Descargar | [ Datasheet 33972.PDF ] | |
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