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PDF W3EG7217S-D3 Data sheet ( Hoja de datos )
| Número de pieza | W3EG7217S-D3 | |
| Descripción | 128MB - 16Mx72 DDR SDRAM REGISTERED | |
| Fabricantes | White Electronic | |
| Logotipo |  |
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White Electronic Designs
W3EG7217S-D3
128MB - 16Mx72 DDR SDRAM REGISTERED, ECC w/PLL
FEATURES
Double-data-rate architecture
DDR200 and DDR266
BI-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2, 2.5 (clock)
Programmable Burst Length (2, 4, 8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input
Auto and self refresh
Serial presence detect
Power supply: 2.5V ± 0.20V
184 pin DIMM package
• D3 = 26.67 (1.05")
www.DataSheet4U.com
Note: Consult factory for availability of lead-free products (F = Lead-Free, G = RoHS
compliant)
DESCRIPTION
The W3EG7217S is a 16Mx72 Double Data Rate
SDRAM memory module based on 128Mb DDR SDRAM
component. The module consists of nine 16Mx8 DDR
SDRAMs in 66 pin TSOP packages mounted on a 184
pin FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible on
both edges and burst lengths allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
* This product is subject to change without notice.
Clock Speed
CL-tRCD-tRP
OPERATING FREQUENCIES
DDR266 @CL=2
133MHz
2-2-2
DDR266 @CL=2.5
133MHz
2.5-3-3
DDR200 @CL=2
100MHz
2-2-2
December 2004
Rev. 1
1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
1 page  
White Electronic Designs
W3EG7217S-D3
IDD SPECIFICATIONS AND TEST CONDITIONS
0°C ≤ TA ≤ 70°C, VCCQ = 2.5V ± 0.2V, VCC = 2.5V ± 0.2V
Includes PLL and Register Power
Parameter
Operating Current
Operating Current
Precharge Power-
Down Standby Current
dle Standby Current
Active Power-Down
Standby Current
Active Standby Current
Operating Current
Operating Current
Auto Refresh Current
Self Refresh Current
Operating Current
Symbol
IDD0
IDD1
IDD2P
IDD2F
IDD3P
IDD3N
IDD4R
IDD4W
IDD5
IDD6
IDD7A
Conditions
One device bank; Active = Precharge; tRC = tRC(MIN); tCK =
tCK(MIN); DQ,DM and DQS inputs changing once per clock
cycle; Address and control inputs changing once every two
cycles.
One device bank; Active-Read-Precharge; Burst = 2; tRC =
tRC(MIN);tCK = tCK (MIN); Iout = 0mA; Address and control
inputs changing once per clock cycle.
All device banks idle; Power- down mode; tCK = tCK(MIN);
CKE = (low)
CS# = High; All device banks idle; tCK = tCK(MIN); CKE =
high; Address and other control inputs changing once per
clock cycle. VIN = VREF for DQ, DQS and DM.
One device bank active; Power-down mode; tCK(MIN); CKE
= (low)
CS# = High; CKE = High; One device bank; Active-
Precharge; tRC = tRAS(MAX); tCK = tCK(MIN); DQ, DM and
DQS inputs changing twice per clock cycle; Address and
other control inputs changing once per clock cycle.
Burst = 2; Reads; Continuous burst; One device bank active;
Address and control inputs changing once per clock cycle;
tCK = tCK(MIN); IOUT = 0mA.
Burst = 2; Writes; Continous burst; One device bank active;
Address and control inputs changing once per clock cycle;
tCK = tCK(MIN); DQ,DM and DQS inputs changing twice per
clock cycle.
tRC = tRC(MIN)
CKE ≤ 0.2V
Four bank interleaving Reads (BL = 4) with auto precharge
with tRC = tRC (MIN); tCK = tCK(MIN); Address and control
inputs change only during Active Read or Write commands.
DDR266@CL = 2
Max
1266
1356
27
750
225
795
1446
1401
2325
372
3246
DDR266@CL = 2.5
Max
1221
1356
27
705
180
750
1401
1356
2325
363
3201
DDR200@CL = 2
Max
1221
1356
27
705
180
750
1401
1356
2325
363
3201
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
December 2004
Rev. 1
5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
5 Page 
White Electronic Designs
W3EG7217S-D3
ORDER INFORMATION FOR D3
Part Number
W3EG7217S262D3
Speed
133MHz/266Mbps
CAS Latency
2
tRCD
2
W3EG7217S265D3
133MHz/266Mbps
2.5
3
W3EG7217S202D3
100MHz/200Mbps
2
2
Note: Consult factory for availability of lead-free products (F = Lead-Free, G = RoHS compliant)
tRP
2
3
2
Height*
26.67 (1.05")
26.67 (1.05")
26.67 (1.05")
PACKAGE DIMENSIONS FOR D3
3.99
(0.157)
(4X)
17.78
(0.700)
10.01
(0.394)
6.35
(0.250)
133.48
(5.255)
MAX
64.77
(2.550)
6.35
(0.250)
1.78
(0.070)
26.67
(1.050)
MAX
3.99
(0.157)
MAX
4.06
(0.160)
MAX
1.27 (0.050) TYP
49.53
(1.950)
3.00
(0.118)
(4X)
1.27 ± 0.10
(0.050 ± 0.004)
* ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES).
December 2004
Rev. 1
11 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet W3EG7217S-D3.PDF ] | |
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