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Número de pieza | W83697UG | |
Descripción | LPC I/O | |
Fabricantes | Winbond | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de W83697UG (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! W83697UF/W83697UG
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WINBOND LPC I/O
W83697UF
W83697UG
Date: May 26, 2005 Revision: A1
Publication Release Date: May 26, 2005
- 1 - Revision A1
1 page W83697UF/W83697UG
2. FEATURES
General
• Meet LPC Spec. 1.1
• Support LDRQ#(LPC DMA), SERIRQ (serial IRQ)
• Include all the features of Winbond I/O W83877TF
• Integrate Smart Card functions
• Compliant with Microsoft PC98/PC99 Hardware Design Guide
• Support DPM (Device Power Management), ACPI
• Programmable configuration settings
• Single 24 or 48 MHz clock input
FDC
• Compatible with IBM PC AT disk drive systems
• Variable write pre-compensation with track selectable capability
• Support vertical recording format
• DMA enable logic
• 16-byte data FIFOs
• Support floppy disk drives and tape drives
• Detects all overrun and underrun conditions
• Built-in address mark detection circuit to simplify the read electronics
• FDD anti-virus functions with software write protect and FDD write enable signal (write data signal
was forced to be inactive)
• Support up to four 3.5-inch or 5.25-inch floppy disk drives
• Completely compatible with industry standard 82077
• 360K/720K/1.2M/1.44M/2.88M format; 250K, 300K, 500K, 1M, 2M bps data transfer rate
• Support 3-mode FDD, and its Win95/98 driver
UART
• Four high-speed 16550 compatible UARTs with 16-byte send/receive FIFOs
• MIDI compatible
• Fully programmable serial-interface characteristics:
--- 5, 6, 7 or 8-bit characters
--- Even, odd or no parity bit generation/detection
--- 1, 1.5 or 2 stop bits generation
• Internal diagnostic capabilities:
--- Loop-back controls for communications link fault isolation
--- Break, parity, overrun, framing error simulation
Publication Release Date: May 26, 2005
- 5 - Revision A1
5 Page W83697UF/W83697UG
5.2 FDC Interface
SYMBOL
DRVDEN0
PIN
1
INDEX#
2
MOA#
DSB#
DSA#
MOB#
3
4
6
7
DIR#
8
STEP#
WD#
WE#
9
10
11
TRAK0#
12
WP#
13
RDATA#
14
HEAD#
15
DSKCHG# 16
I/O
OD24
INcsu
OD24
OD24
OD24
OD24
OD24
OD24
OD24
OD24
INcsu
INcsu
INcsu
OD24
INcsu
FUNCTION
Drive Density Select bit 0.
This Schmitt-triggered input from the disk drive is active low
when the head is positioned over the beginning of a track
marked by an index hole. This input pin is pulled up internally by
a 1 KΩ resistor. The resistor can be disabled by bit 7 of L0-
CRF0 (FIPURDWN).
Motor A On. When set to 0, this pin enables disk drive 0. This is
an open drain output.
Drive Select B. When set to 0, this pin enables disk drive B.
This is an open drain output.
Drive Select A. When set to 0, this pin enables disk drive A.
This is an open drain output.
Motor B On. When set to 0, this pin enables disk drive 1. This is
an open drain output.
Direction of the head step motor. An open drain output.
Logic 1 = outward motion
Logic 0 = inward motion
Step output pulses. This active low open drain output produces
a pulse to move the head to another track.
Write data. This logic low open drain writes pre-compensation
serial data to the selected FDD. An open drain output.
Write enable. An open drain output.
Track 0. This Schmitt-triggered input from the disk drive is
active low when the head is positioned over the outermost track.
This input pin is pulled up internally by a 1 KΩ resistor. The
resistor can be disabled by bit 7 of L0-CRF0 (FIPURDWN).
Write protected. This active low Schmitt input from the disk drive
indicates that the diskette is write-protected. This input pin is
pulled up internally by a 1 KΩ resistor. The resistor can be
disabled by bit 7 of L0-CRF0 (FIPURDWN).
The read data input signal from the FDD. This input pin is pulled
up internally by a 1 KΩ resistor. The resistor can be disabled by
bit 7 of L0-CRF0 (FIPURDWN).
Head select. This open drain output determines which disk drive
head is active.
Logic 1 = side 0
Logic 0 = side 1
Diskette change. This signal is active low at power on and
whenever the diskette is removed. This input pin is pulled up
internally by a 1 KΩ resistor. The resistor can be disabled by bit
7 of L0-CRF0 (FIPURDWN).
- 11 -
Publication Release Date: May 26, 2005
Revision A1
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet W83697UG.PDF ] |
Número de pieza | Descripción | Fabricantes |
W83697UF | LPC I/O | Winbond |
W83697UG | LPC I/O | Winbond |
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