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PDF DM54LS73A Data sheet ( Hoja de datos )
| Número de pieza | DM54LS73A | |
| Descripción | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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June 1989
DM54LS73A DM74LS73A Dual Negative-Edge-Triggered
Master-Slave J-K Flip-Flops with Clear
and Complementary Outputs
General Description
This device contains two independent negative-edge-trig-
gered J-K flip-flops with complementary outputs The J and
K data is processed by the flip-flops on the falling edge of
the clock pulse The clock triggering occurs at a voltage
level and is not directly related to the transition time of the
negative going edge of the clock pulse The data on the J
and K inputs is allowed to change while the clock is high or
low without affecting the outputs as long as setup and hold
times are not violated A low logic level on the clear input
will reset the outputs regardless of the levels of the other
inputs
Connection Diagram
Dual-In-Line Package
www.DataSheet4U.com
TL F 6372 – 1
Order Number DM54LS73AJ DM54LS73AW DM74LS73AM or DM74LS73AN
See NS Package Number J14A M14A N14A or W14B
Function Table
Inputs
Outputs
CLR CLK J K
Q
Q
L
X
XX
L
H
vH
L L Q0
Q0
H v HL H L
H v LH L H
H v HH
Toggle
H
H
X X Q0
Q0
H e High Logic Level
L e Low Logic Level
X e Either Low or High Logic Level
v e Negative going edge of pulse
Q0 e The output logic level before the indicated input conditions were es-
tablished
Toggle e Each output changes to the complement of its previous level on
each falling edge of the clock pulse
C1995 National Semiconductor Corporation TL F 6372
RRD-B30M105 Printed in U S A
1 page  
Physical Dimensions inches (millimeters) (Continued)
14-Lead Small Outline Molded Package (M)
Order Number DM74LS73AM
NS Package Number M14A
14-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS73AN
NS Package Number N14A
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet DM54LS73A.PDF ] | |
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