DataSheet.es    


PDF DS25BR100 Data sheet ( Hoja de datos )

Número de pieza DS25BR100
Descripción 3.125 Gbps LVDS Buffer
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



Hay una vista previa y un enlace de descarga de DS25BR100 (archivo pdf) en la parte inferior de esta página.


Total 14 Páginas

No Preview Available ! DS25BR100 Hoja de datos, Descripción, Manual

April 2007
DS25BR100
3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis and
Receive Equalization
General Description
The DS25BR100 is a single channel 3.125 Gbps LVDS buffer
optimized for high-speed signal transmission over lossy FR-4
printed circuit board backplanes and balanced metallic ca-
bles. Fully differential signal paths ensure exceptional signal
integrity and noise immunity.
The DS25BR100 features transmit pre-emphasis (PE) and
receive equalization (EQ), making it ideal for use as a re-
peater device. Other LVDS devices with similar IO character-
istics include the following products. The DS25BR120
features four levels of pre-emphasis for use as an optimized
driver device, while the DS25BR110 features four levels of
equalization for use as an optimized receiver device. The
DS25BR150 is a buffer/repeater with the lowest power con-
sumption and does not feature transmit pre-emphasis nor
receive equalization.
Wide input common mode range allows the receiver to accept
signals with LVDS, CML and LVPECL levels; the output levels
are LVDS. A very small package footprint requires minimal
space on the board while the flow-through pinout allows easy
board layout. The differential inputs and outputs are internally
terminated with a 100resistor to lower device input and out-
put return losses, reduce component count, and further min-
imize board space.
Features
DC - 3.125 Gbps low jitter, high noise immunity, low power
operation
Receive equalization reduces ISI jitter due to media loss
Transmit pre-emphasis drives lossy backplanes and
cables
On-chip 100input and output termination minimizes
insertion and return losses, reduces component count and
minimizes board space
7 kV ESD on LVDS I/O pins protects adjoining
components
Small 3 mm x 3 mm 8-LLP space saving package
Applications
Clock and data buffering
Metallic cable driving and equalization
FR-4 equalization
Typical Application
© 2007 National Semiconductor Corporation 201791
20179110
www.national.com

1 page




DS25BR100 pdf
AC Electrical Characteristics (Note 11)
Over recommended operating supply and temperature ranges unless otherwise specified. (Notes 9, 10)
Symbol
Parameter
Conditions
Min
LVDS OUTPUT AC SPECIFICATIONS (OUT+, OUT-)
tPHLD
tPLHD
Differential Propagation Delay High to Low
Differential Propagation Delay Low to High
RL = 100Ω
tSKD1 Pulse Skew |tPLHD − tPHLD| (Note 12)
tSKD2 Part to Part Skew (Note 13)
tLHT Rise Time
tHLT Fall Time
RL = 100Ω
JITTER PERFORMANCE WITH PE = OFF AND EQ = LOW (Figures 6, 7)
tRJ1A
tRJ2A
Random Jitter (RMS Value)
Input Test Channel D
(Note 14)
VID = 350 mV
VCM = 1.2V
Clock (RZ)
PE = 0, EQ = 0
2.5 Gbps
3.125 Gbps
tDJ1A
tDJ2A
Deterministic Jitter (Peak to Peak)
Input Test Channel D
(Note 15)
VID = 350 mV
VCM = 1.2V
K28.5 (NRZ)
PE = 0, EQ = 0
2.5 Gbps
3.125 Gbps
tTJ1A
tTJ2A
Total Jitter (Peak to Peak)
Input Test Channel D
(Note 16)
VID = 350 mV
VCM = 1.2V
PRBS-23 (NRZ)
PE = 0, EQ = 0
2.5 Gbps
3.125 Gbps
JITTER PERFORMANCE WITH PE = OFF AND EQ = MEDIUM (Figures 6, 7)
tRJ1B
tRJ2B
Random Jitter (RMS Value)
Input Test Channel E
(Note 14)
VID = 350 mV
VCM = 1.2V
Clock (RZ)
PE = 0, EQ = 1
2.5 Gbps
3.125 Gbps
tDJ1B
tDJ2B
Deterministic Jitter (Peak to Peak)
Input Test Channel E
(Note 15)
VID = 350 mV
VCM = 1.2V
K28.5 (NRZ)
PE = 0, EQ = 1
2.5 Gbps
3.125 Gbps
tTJ1B
tTJ2B
Total Jitter (Peak to Peak)
Input Test Channel E
(Note 16)
VID = 350 mV
VCM = 1.2V
PRBS-23 (NRZ)
PE = 0, EQ = 1
2.5 Gbps
3.125 Gbps
JITTER PERFORMANCE WITH PE = MEDIUM AND EQ = LOW (Figures 5, 7)
tRJ1C
tRJ2C
Random Jitter (RMS Value)
Input Test Channel D
Output Test Channel B
(Note 14)
VID = 350 mV
VCM = 1.2V
Clock (RZ)
PE = 1, EQ = 0
2.5 Gbps
3.125 Gbps
tDJ1C
tDJ2C
Deterministic Jitter (Peak to Peak)
Input Test Channel D
Output Test Channel B
(Note 15)
VID = 350 mV
VCM = 1.2V
K28.5 (NRZ)
PE = 1, EQ = 0
2.5 Gbps
3.125 Gbps
tTJ1C
tTJ2C
Total Jitter (Peak to Peak)
Input Test Channel D
Output Test Channel B
(Note 16)
VID = 350 mV
VCM = 1.2V
PRBS-23 (NRZ)
PE = 1, EQ = 0
2.5 Gbps
3.125 Gbps
Typ
350
350
45
45
80
80
0.5
0.5
1
11
0.03
0.06
0.5
0.5
10
27
0.07
0.12
0.5
0.5
29
29
0.10
0.13
Max Units
465 ps
465 ps
100 ps
150 ps
150 ps
150 ps
1 ps
1 ps
16 ps
31 ps
0.09 UIP-P
0.14 UIP-P
1 ps
1 ps
29 ps
43 ps
0.12 UIP-P
0.17 UIP-P
1 ps
1 ps
57 ps
51 ps
0.19 UIP-P
0.22 UIP-P
5 www.national.com

5 Page





DS25BR100 arduino
Typical Performance
20179134
Maximum Data Rate as a Function of CAT5e (Belden
1700A) Length
20179135
Maximum Data Rate as a Function of CAT5e (Belden
1700A) Length
20179130
A 2.5 Gbps NRZ PRBS-7 After 60"
Differential FR-4 Stripline
V:125 mV / DIV, H:75 ps / DIV
20179131
An Equalized (with PE and EQ) 2.5 Gbps NRZ PRBS-7
After The 40" Input and 20" Output Differential Stripline
(Figure 5)
V:125 mV / DIV, H:75 ps / DIV
20179132
A 3.125 Gbps NRZ PRBS-7 After 60"
Differential FR-4 Stripline
V:125 mV / DIV, H:50 ps / DIV
20179133
An Equalized (with PE and EQ) 3.125 Gbps NRZ PRBS-7
After The 40" Input and 20" Output Differential Stripline
(Figure 5)
V:125 mV / DIV, H:50 ps / DIV
11 www.national.com

11 Page







PáginasTotal 14 Páginas
PDF Descargar[ Datasheet DS25BR100.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
DS25BR100DS25BR100/101 3.125Gbps LVDS Buffer w/Transmit Pre-Empha Rcve Equalization (Rev. F)Texas Instruments
Texas Instruments
DS25BR1003.125 Gbps LVDS BufferNational Semiconductor
National Semiconductor
DS25BR100(DS25BR100 / DS25BR101) 3.125 Gbps LVDS BufferNational Semiconductor
National Semiconductor
DS25BR101DS25BR100/101 3.125Gbps LVDS Buffer w/Transmit Pre-Empha Rcve Equalization (Rev. F)Texas Instruments
Texas Instruments

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar