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PDF AM42DL32X4G Data sheet ( Hoja de datos )
| Número de pieza | AM42DL32X4G | |
| Descripción | Simultaneous Operation Flash Memory and 4 Mbit (256 K x 16-Bit) Static RAM | |
| Fabricantes | AMD | |
| Logotipo |  |
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PRELIMINARY
Am42DL32x4G
Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash
Memory and 4 Mbit (256 K x 16-Bit) Static RAM
DISTINCTIVE CHARACTERISTICS
MCP Features
■ Power supply voltage of 2.7 to 3.3 volt
■ High performance
— Flash Access time as fast as 70 ns
— SRAM access time as fast as 55 ns
■ Package
— 73-Ball FBGA
■ Operating Temperature
— –40°C to +85°C
Flash Memory Features
ARCHITECTURAL ADVANTAGES
■ Simultaneous Read/Write operations
— Data can be continuously read from one bank while
executing erase/program functions in other bank
— Zero latency between read and write operations
■ Secured Silicon (SecSi) Sector: Extra 256 Byte sector
— Factory locked and identifiable: 16 bytes available for
secure, random factory Electronic Serial Number; verifiable
as factory locked through autoselect function.
— Customer lockable: Sector is one-time programmable. Once
locked, data cannot be changed
■ Zero Power Operation
— Sophisticated power management circuits reduce power
consumed during inactive periods to nearly zero
■ Top or bottom boot block
■ Manufactured on 0.17 µm process technology
■ Compatible with JEDEC standards
— Pinout and software compatible with single-power-supply
flash standard
PERFORMANCE CHARACTERISTICS
■ High performance
— Access time as fast as 70 ns
— Program time: 4 µs/word typical utilizing Accelerate function
■ Ultra low power consumption (typical values)
— 2 mA active read current at 1 MHz
— 10 mA active read current at 5 MHz
— 200 nA in standby or automatic sleep mode
■ Minimum 1 million write cycles guaranteed per sector
■ 20 Year data retention at 125°C
— Reliable operation for the life of the system
SOFTWARE FEATURES
■ Data Management Software (DMS)
— AMD-supplied software manages data programming and
erasing, enabling EEPROM emulation
— Eases sector erase limitations
■ Supports Common Flash Memory Interface (CFI)
■ Erase Suspend/Erase Resume
— Suspends erase operations to allow programming in same
bank
■ Data# Polling and Toggle Bits
— Provides a software method of detecting the status of
program or erase cycles
■ Unlock Bypass Program command
— Reduces overall programming time when issuing multiple
program command sequences
HARDWARE FEATURES
■ Any combination of sectors can be erased
■ Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or erase cycle
completion
■ Hardware reset pin (RESET#)
— Hardware method of resetting the internal state machine to
reading array data
■ WP#/ACC input pin
— Write protect (WP#) function allows protection of two outermost
boot sectors, regardless of sector protect status
— Acceleration (ACC) function accelerates program timing
■ Sector protection
— Hardware method of locking a sector, either in-system or
using programming equipment, to prevent any program or
erase operation within that sector
— Temporary Sector Unprotect allows changing data in
protected sectors in-system
SRAM Features
■ Power dissipation
— Operating: 22 mA maximum for 70 ns, 30 mA maximum for
55 ns
— Standby: 10 µA maximum
■ CE1s# and CE2s Chip Select
■ Power down features using CE1s# and CE2s
■ Data retention supply voltage: 1.5 to 3.3 volt
■ Byte data control: LB#s (DQ7–DQ0), UB#s (DQ15–DQ8)
This document contains information on a product under development at Advanced Micro Devices. The information
Publication# 25822 Rev: B Amendment/0
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
Issue Date: May 19, 2003
product without notice.
Refer to AMD’s Website (www.amd.com) for the latest information.
1 page  
PRELIMINARY
PRODUCT SELECTOR GUIDE
Part Number
Speed
Options
Standard Voltage
Range: VCC =
2.7–3.3 V
Max Access Time (ns)
CE# Access (ns)
OE# Access (ns)
Flash Memory
71 70
70 70
70 70
30 30
Am42DL32x4G
85 71
85 55
85 55
40 25
MCP BLOCK DIAGRAM
A20 to A0
A–1
WP#/ACC
RESET#
CE#f
CIOf
A20 to A0
VCCf VSS
32 M Bit
Flash Memory
RY/BY#
DQ15/A-1 to DQ0
SRAM
70
70
70
35
85
85
85
35
LB#s
UB#s
WE#
OE#
CE1#s
CE2s
VCCs/VCCQ VSS/VSSQ
AA017totoA1A90
4 M Bit
Static RAM
DQ15/A-1 to DQ0
DQ15/A-1 to DQ0
May 19, 2003
Am42DL32x4G
5
5 Page 
PRELIMINARY
Operation
(Notes 1, 2)
Table 1. Device Bus Operations—Flash Word Mode, CIOf = VIH
CE#f CE1#s CE2s OE# WE#
Addr.
LB#s
UB#s
RESET#
WP#/ACC
(Note 4)
DQ7–
DQ0
DQ15–
DQ8
Read from Flash
HX
L
X
L
LH
AIN
X
X
H
L/H
DOUT
DOUT
Write to Flash
HX
L
X
HL
L
AIN
X
X
H
(Note 4)
DIN
DIN
Standby
VCC ±
0.3 V
H
X
X
XX
L
X
X
X
VCC ±
0.3 V
H High-Z High-Z
Output Disable
HH
X
LX
L LH
H
HH
X
XL
L/H High-Z High-Z
Flash Hardware
Reset
HX
X
XX
X
XX
XL
L
L/H High-Z High-Z
Sector Protect
(Note 5)
HX
SADD,
L
X
L
H
L
A6 = L,
A1 = H,
X
X
VID
A0 = L
L/H DIN X
Sector Unprotect
(Note 5)
HX
SADD,
L
X
L
H
L
A6 = H,
A1 = H,
X
X
VID
(Note 6)
DIN
X
A0 = L
Temporary Sector
Unprotect
HX
X
X
XX
L
X
XX
VID
(Note 6)
DIN High-Z
Read from SRAM
Write to SRAM
LL
H L H L H AIN H L
LH
LL
H L H X L AIN H L
LH
H
H
DOUT
DOUT
X High-Z DOUT
DOUT High-Z
DIN DIN
X High-Z DIN
DIN High-Z
Legend: L = Logic Low = VIL, H = Logic High = VIH, VID = 11.5–12.5 V, VHH = 9.0 ± 0.5 V, X = Don’t Care, SADD = Flash Sector
Address, AIN = Address In, DIN = Data In, DOUT = Data Out
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#f = VIL, CE1#s = VIL and CE2s = VIH at the same time.
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = VIL , the boot sectors will be protected. If WP#/ACC = VIH the boot sectors protection will be removed.
If WP#/ACC = VACC (9V), the program time will be reduced by 40%.
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector
Block Protection and Unprotection” section.
6. If WP#/ACC = VIL, the two outermost boot sectors remain protected. If WP#/ACC = VIH, the two outermost boot sector protection
depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection and
Unprotection”. If WP#/ACC = VHH, all sectors will be unprotected.
May 19, 2003
Am42DL32x4G
11
11 Page | ||
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| PDF Descargar | [ Datasheet AM42DL32X4G.PDF ] | |
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