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EM6617 Schematic ( PDF Datasheet ) - EM Microelectronic

Teilenummer EM6617
Beschreibung Ultra-low power microcontroller
Hersteller EM Microelectronic
Logo EM Microelectronic Logo 




Gesamt 65 Seiten
EM6617 Datasheet, Funktion
EM MICROELECTRONIC - MARIN SA
EM6617
Ultra Low Power Microcontroller with ADC AND EEPROM
Features
Low Power - 3.2 µA active mode, ADC off
- 9.0 µA active mode, ADC on
- 0.6 µA standby mode
- 0.1µA sleep mode
@ 3.0V, 32kHz, 25°C
Voltage range logic incl. EEPROM 2.0 to 5.5 V
System operating clock : 32 or 128KHz (metal option)
Voltage range for the ADC is 2.6 to 5.5 V
2 clocks per instruction cycle
72 basic instructions
ROM 3k × 16 bit
RAM 128 × 4 bit
E2PROM 64 × 8 bit
Voltage Level Detector, 3 levels software
selectable :2.2, 2.5, 3.0 V
2 channel ADC, successive approximation method;
conversion time at 32 kHz : 305µs
Max. 12 inputs (3 ports); port A, port B, port C
Max. 8 outputs (2 ports); port B, port C
Serial Write Buffer, 256 bit wide , 4 bit rates
Oscillation supervisor and timer watchdog
Universal 10-bit counter, PWM, event counter
8 internal interrupt sources (2 × timer , 2 × prescaler,
ADC, VLD, FIFO, EEPROM)
4 external interrupt sources (input port A )
Frequency output; 32kHz, 2kHz, 1kHz, PWM
Figure 1. Architecture
Figure 2. Pin Configuration
Description
The EM6617 is an advanced single chip CMOS 4-bit
microcontroller. It contains ROM, RAM, power on reset,
watchdog timer, oscillation detection circuit, combined
timer , event counter, prescaler, E2PROM, 2 channel
ADC, serial write buffer, voltage level detector and
several clock functions. The low voltage feature and low
power consumption make it the most suitable controller
for battery, stand alone and mobile equipment. The
EM6617 is manufactured using EM Microelectronic’s
advanced low power (ALP) CMOS Process.
Typical Applications
Sensor & detector interface
Heat meter interface
Security systems
Household equipment controls
Automotive controls
Measurement equipment
R/F and IR. control
Voltage control
Copyright © 2005, EM Microelectronic-Marin SA
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EM6617 Datasheet, Funktion
EM6617
3. Operating Modes
The EM6617 has two low power dissipation modes, standby and sleep. Figure 5 is a transition diagram for these
modes.
3.1 Active Mode
The active mode is the actual CPU running mode. Instructions are read from the internal ROM and executed by
the CPU. Leaving active mode via the halt instruction to go into standby mode, the Sleep bit write to go into Sleep
mode or a reset from port A to go into reset mode.
3.2 Standby Mode
Executing a halt instruction puts the EM6617
into standby mode. The voltage regulator,
oscillator, watchdog timer, ADC, interrupts,
SWB, timers and counters are operating.
However, the CPU stops since the clock
related to instruction execution stops.
Registers, RAM and I/O pins retain their
states prior to standby mode. A reset or an
interrupt request if enabled cancels standby.
Figure 5. Mode transition diagram
Halt
instruction
Active
Standby
IRQ
Reset=1
Reset=0
Sleep bit
write
Sleep
3.3 Sleep Mode
Writing to the Sleep bit in the RegSysCntl1
register puts the EM6617 in sleep mode. The
Reset=1
Reset=1
oscillator stops and most functions of the
EM6617 are inactive. To be able to write to
Reset
the Sleep bit, the SleepEn bit in
RegSysCntl2 must first be set to "1". In sleep
mode only the voltage regulator and the reset input are active. The RAM data integrity is maintained. Sleep mode
may be canceled only by a high level of min 10µs at the Reset terminal or by the selected port A input reset
combination, if option InpResSleep in register OPTFSelPB is turned on.
Due to the cold-start characteristics of the oscillator, waking up from sleep mode may take some time to
guarantee stable oscillation. During sleep mode and the following start up the EM6617 is in reset state. Waking
up from sleep clears the Sleep flag but not the SleepEn bit. Inspecting the SleepEn allows to determine if the
EM6617 was powered up (SleepEn = "0") or woken up from sleep (SleepEn = "1").
Table 3.3.1. Internal State in Standby and Sleep Mode
Function
Standby
Oscillator
Active
Oscillator Watchdog
Active
Instruction Execution
Stopped
Interrupt Functions
Active
Registers and Flags
Retained
RAM Data
Retained
Option Registers
Retained
Timer & Counter
Active
Logic Watchdog
Active
I/O Port B and Serial Port
Active
Input Port A
Active
LCD
Strobe Output
Buzzer Output
Voltage Level Detector
Reset Pin
Active
Active
Active
Finishes ongoing measure, then stop
Active
Sleep
Stopped
Stopped
Stopped
Stopped
Reset
Retained
Retained
Reset
Reset
High Impedance,
Pull’s as defined in option register
No pull-downs and inputs deactivated
except if InpResSleep = "1"
Stopped (display off)
Active
High Impedance
Stopped
Active
Copyright © 2005, EM Microelectronic-Marin SA
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EM6617 pdf, datenblatt
EM6617
6. Oscillator and Prescaler
6.1 Oscillator
A built-in crystal oscillator generates the system operating clock for the CPU and peripheral blocks, from an
externally connected crystal (typically 32.768kHz or 128KHz depending of the metal opt. on table 19.1.6). The
oscillator circuit is supplied by the regulated voltage, Vreg. In sleep mode the oscillator is stopped.
EM’s special design techniques guarantee the low current consumption of this oscillator. The external impedance
between the oscillator pads must be greater than 10MOhm. Connection of any other components to the two
oscillator pads must be confirmed by EM Microelectronic-Marin SA.
6.2 Prescaler
The prescaler consists of fifteen elements divider chain which delivers clock signals for the peripheral circuits
such as timer/counter, buzzer, LCD voltage multiplier, debouncer and edge detectors, as well as generating
prescaler interrupts. The input to the prescaler is the system clock signal. Power on initializes to Hex(0001).
Table 6.2.1 Prescaler Clock Name Definition
Function
Name
32 KHz Xtal
System clock
Ck[16]
32768 Hz
System clock / 2
Ck[15]
16384 Hz
System clock / 4
Ck[14]
8192 Hz
System clock / 8
Ck[13]
4096 Hz
System clock/ 16
Ck[12]
2048 Hz
System clock / 32
Ck[11]
1024 Hz
System clock / 64
Ck[10]
512 Hz
System clock / 128
ck [9]
256 Hz
Function
System clock / 256
System clock / 512
System clock / 1024
System clock / 2048
System clock / 4096
System clock / 8192
System clock / 16384
System clock / 32768
Name
Ck[8]
Ck[7]
Ck[6]
Ck[5]
Ck[4]
Ck[3]
Ck[2]
Ck[1]
32 KHz Xtal
128 Hz
64 Hz
32 Hz
16 Hz
8 Hz
4 Hz
2 Hz
1 Hz
Table 6.2.2 Control of Prescaler Register RegPresc
Bit Name
Reset R/W Description
3 PWMOn 0
R/W see 10 bit counter
2 ResPresc 0
R/W Write Reset prescaler
1 -> Resets the divider chain
from Ck[14] down to
Ck[2], sets Ck[1].
0 -> No action.
The Read value is always '0'
1 PrIntSel 0
R/W Interrupt select.
0 -> Interrupt from Ck[4]
1 -> Interrupt from Ck[6]
0 DebSel 0
R/W Debouncer clock select.
0 -> Debouncer with Ck[8]
1 -> Debouncer with Ck[11] or
Ck[14]
Figure 11. Prescaler Frequency Timing
Prescaler Reset
System Clock
Ck[16]
Ck[15]
Ck[14]
Horizontal Scale Change
Ck[2]
Ck[1]
First positive edge of 1 Hz clock is 1s after
the falling reset edge
With DebSel = 1 one may choose either the Ck[11] or Ck[14] debouncer frequency by selecting the corresponding
metal mask option. Relative to 32kHz the corresponding max. debouncer times are then 2 ms or 0.25 ms. For the
metal mask selection refer to chapter 19.1.4.
Switching the PrIntSel may generate an interrupt request. Avoid it with MaskIRQ32/8 = 0 selection during the
switching operation.
The prescaler contains 2 interrupt sources:
- IRQ32/8 ; this is Ck[6] or Ck[4] positive edge interrupt, the selection is depending on bit PrIntSel.
- IRQHz1 ; this is Ck[1] positive edge interrupt
There is no interrupt generation on reset.
The first IRQHz1 Interrupt occurs 1 sec (32kHz) after reset.
Copyright © 2005, EM Microelectronic-Marin SA
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