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Teilenummer | AGM1064B |
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Beschreibung | SPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY | |
Hersteller | AZ Displays | |
Logo | ||
Gesamt 13 Seiten AZ DISPLAYS, INC.
COMPLETE LCD SOLUTIONS
SPECIFICATIONS FOR
LIQUID CRYSTAL DISPLAY
www.DataSheet4U.com
PART NUMBER:
REVISED:
AGM1064B Series
MAY 14, 2003
Select the internal voltage regulator or external voltage regulator.
36 VRS
I VRS = 0: using the external VREF
VRS = 1: using the internal VREF
37 V1
LCD driver supplies voltages. The voltage determined by LCD
cell is impedance-converted by a resistive driver or an
operation amplifier for application. Voltages should be
38 V2
according to the following relationship:
V0 = V1 = V2 = V3 = V4 = VSS
39
V3
Supply When the on-chip operating power circuit is on, the following
voltages are supplied to V1 to V4 by the on-chip power circuit.
Voltage selection is performed by the Set LCD Bias command.
40 V4
LCD
bias
V1
V2
V3
1/5
bias
4/5V0
3/5V0
2/5V0
1/6
bias
5/6V0
4/6V0
2/6V0
41 V0
1/7
bias
6/7V0
5/7V0
2/7V0
1/8
bias
7/8V0
6/8V0
2/8V0
1/9
bias
8/9V0
7/9V0
2/9V0
42 VR
Voltage adjustment pad. Applies voltage between V0 and VSS
I using a resistive divider.
43 M/S
44 CLS
45 C86
This terminal selects the master/slave operation for the
NT7532 chips. Master operation outputs the timing signals
I that are required for the LCD display, while slave operation
inputs the timing signals required for the liquid crystal display,
synchronizing the liquid crystal display system.
Terminal to select whether enable or disable the display clock
internal oscillator circuit.
I
CLS = “H”: Internal oscillator circuit is enabled
CLS = “L”: Internal oscillator circuit is disabled
(requires external input)
When CLS = “L”, input the display clock through the CL pad.
This is the MPU interface switch terminal
I C86 = “H”: 6800 Series MPU interface
C86 = “L”: 8080 MPU interface
This is the parallel data input/serial data input switch terminal
P/S = “H”: Parallel data input
P/S = “L”: Serial data input
The following applies depending on the P/S status:
46 P/S
47 /HPM
48 IRS
P/S Data/Command Data Read/Write Serial
I "H"
A0
D0 to D7 RD WR
-
"L" A0 SI (D7) Write only SCL (D6)
When P/S = “L”, D0 to D5 are HZ. D0 to D5 may be “H”, “L”or
Open. RD(E) and WR( W R/ ) are fixed to either “H”or “L”.
With serial data input, RAM display data reading is not
Supported.
This is the power control terminal for the power supply circuit
for liquid crystal drive.
HPM = “H”, Normal mode
I HPM = “L”, High power mode
This pad is enabled only when the master operation mode is
selected and It is fixed to either “H”or “L”when the slave
operation mode is selected.
This terminal selects the resistors for the V0 voltage level
adjustment.
I IRS = “H”, Use the internal resistors
IRS = “L”, Do not use the internal resistors
The V0 voltage level is regulated by an external resistive
Page 5
6 Page Electro-optical Units
4.1 Electro-optical Characteristics
No Item Symbol Condition
1 Contrast Ratio
2 Response Rise
time Down
CR Ta=23±3
Tr
Tf
Viewing
3 Angle
Range
Ta=23±3
Cr=2
Min Typ Max Unit Drive
- 5.5 - -
- 260 - ms
- 200 - ms
- 60 -
Vop=10V
1/64
Duty
- 25 -
1/9 Bias
Deg f=100HZ
- 50 -
LCD Driving
4 Voltage
VOP Ta=23±3
- 50 -
- 10 - V
Page 5
12 Page | ||
Seiten | Gesamt 13 Seiten | |
PDF Download | [ AGM1064B Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
AGM1064B | SPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY | AZ Displays |
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