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Teilenummer | AAT1146 |
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Beschreibung | Step-Down Converter | |
Hersteller | AAT | |
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Gesamt 20 Seiten AAT1146
Fast Transient 400mA Step-Down Converter
General Description
Features
SwitchReg™
The AAT1146 SwitchReg is a member of
AnalogicTech's Total Power Management IC™
(TPMIC™) product family. It is a 1.4MHz step-
down converter with an input voltage range of 2.7V
to 5.5V and output voltage as low as 0.6V. It is
optimized to react quickly to a load variation.
The AAT1146 is available in fixed voltage versions
with internal feedback and a programmable ver-
sion with external feedback resistors. It can deliver
400mA of load current while maintaining a low
27μA no load quiescent current. The 1.4MHz
switching frequency minimizes the size of external
components while keeping switching losses low.
The AAT1146 is designed to maintain high efficien-
cy throughout the operating range, which is critical
for portable applications.
• VIN Range: 2.7V to 5.5V
• VOUT Fixed or Adjustable from 0.6V to VIN
• 27μA No Load Quiescent Current
• Up to 98% Efficiency
• 400mA Max Output Current
• 1.4MHz Switching Frequency
• 120μs Soft Start
• Fast Load Transient
• Over-Temperature Protection
• Current Limit Protection
• 100% Duty Cycle Low-Dropout Operation
• <1μA Shutdown Current
• SC70JW-8 Package
• Temperature Range: -40°C to +85°C
The AAT1146 is available in a Pb-free, space-saving
Applications
2.0x2.1mm SC70JW-8 package and is rated over
the -40°C to +85°C temperature range.
• Cellular Phones
• Digital Cameras
•www.DataSheet4U.com Handheld Instruments
• Microprocessor / DSP Core / IO Power
• PDAs and Handheld Computers
• USB Devices
Typical Application (Fixed Output Voltage)
VIN
C2
4.7μF
U1
AAT1146
3 VIN
LX 4
1 EN
OUT 2
5 AGND PGND 7
8 PGND PGND 6
L1
4.7μH
VO
C1
4.7μF
1146.2006.04.1.3
1
AAT1146
Fast Transient 400mA Step-Down Converter
Typical Characteristics
Soft Start
(VIN = 3.6V; VOUT = 1.8V; IOUT = 400mA)
5.0
4.0 VEN
3.0
2.0
1.0
0.0
-1.0
-2.0
-3.0
-4.0
-5.0
VO
IL
Time (100μs/div)
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
-0.4
Line Regulation
(VOUT = 1.8V)
0.40
0.30
0.20 IOUT = 10mA
0.10
0.00
-0.10
-0.20
-0.30
IOUT = 1mA
IOUT = 400mA
-0.40
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Input Voltage (V)
Output Voltage Error vs. Temperature
(VIN = 3.6V; VO = 1.8V; IOUT = 400mA)
2.0
1.0
0.0
-1.0
-2.0
-40
-20
0 20 40 60
Temperature (°C)
80 100
Switching Frequency vs. Temperature
(VIN = 3.6V; VOUT = 1.8V)
15.0
12.0
9.0
6.0
3.0
0.0
-3.0
-6.0
-9.0
-12.0
-15.0
-40
-20
0
20 40 60 80 100
Temperature (°C)
Frequency vs. Input Voltage
2.0
1.0 VOUT = 1.8V
0.0
-1.0
VOUT = 2.5V
VOUT = 3.3V
-2.0
-3.0
-4.0
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
Input Voltage (V)
No Load Quiescent Current vs. Input Voltage
50
45
40
35 85°C 25°C
30
25
20
-40°C
15
10
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
Input Voltage (V)
6 1146.2006.04.1.3
6 Page AAT1146
Fast Transient 400mA Step-Down Converter
The maximum input capacitor RMS current is:
IRMS = IO ·
VO
VIN
·
⎛⎝1 -
VO ⎞
VIN ⎠
The input capacitor RMS ripple current varies with
the input and output voltage and will always be less
than or equal to half of the total DC load current.
VO
VIN
· ⎛⎝1 -
VO ⎞
VIN ⎠
=
D · (1 - D) =
0.52 = 1
2
for VIN = 2 x VO
I =RMS(MAX)
IO
2
The term
VO
VIN
·
⎛⎝1
-
VO ⎞
VIN ⎠
appears in both the input
voltage ripple and input capacitor RMS current
equations and is a maximum when VO is twice VIN.
This is why the input voltage ripple and the input
capacitor RMS current ripple are a maximum at
50% duty cycle.
The input capacitor provides a low impedance loop
for the edges of pulsed current drawn by the
AAT1146. Low ESR/ESL X7R and X5R ceramic
capacitors are ideal for this function. To minimize
stray inductance, the capacitor should be placed as
closely as possible to the IC. This keeps the high
frequency content of the input current localized,
minimizing EMI and input voltage ripple.
The proper placement of the input capacitor (C2)
can be seen in the evaluation board layout in
Figure 2.
A laboratory test set-up typically consists of two
long wires running from the bench power supply to
the evaluation board input voltage pins. The induc-
tance of these wires, along with the low-ESR
ceramic input capacitor, can create a high Q net-
work that may affect converter performance. This
problem often becomes apparent in the form of
excessive ringing in the output voltage during load
transients. Errors in the loop phase and gain meas-
urements can also result.
12
Since the inductance of a short PCB trace feeding
the input voltage is significantly lower than the
power leads from the bench power supply, most
applications do not exhibit this problem.
In applications where the input power source lead
inductance cannot be reduced to a level that does
not affect the converter performance, a high ESR
tantalum or aluminum electrolytic should be placed
in parallel with the low ESR, ESL bypass ceramic.
This dampens the high Q network and stabilizes
the system.
Output Capacitor
The output capacitor limits the output ripple and
provides holdup during large load transitions. A
4.7μF to 10μF X5R or X7R ceramic capacitor typi-
cally provides sufficient bulk capacitance to stabi-
lize the output during large load transitions and has
the ESR and ESL characteristics necessary for low
output ripple.
The output voltage droop due to a load transient is
dominated by the capacitance of the ceramic out-
put capacitor. During a step increase in load cur-
rent, the ceramic output capacitor alone supplies
the load current until the loop responds. Within two
or three switching cycles, the loop responds and
the inductor current increases to match the load
current demand. The relationship of the output volt-
age droop during the three switching cycles to the
output capacitance can be estimated by:
COUT
=
3 · ΔILOAD
VDROOP · FS
Once the average inductor current increases to the
DC load level, the output voltage recovers. The
above equation establishes a limit on the minimum
value for the output capacitor with respect to load
transients.
The internal voltage loop compensation also limits
the minimum output capacitor value to 4.7μF. This
is due to its effect on the loop crossover frequency
(bandwidth), phase margin, and gain margin.
Increased output capacitance will reduce the
crossover frequency with greater phase margin.
1146.2006.04.1.3
12 Page | ||
Seiten | Gesamt 20 Seiten | |
PDF Download | [ AAT1146 Schematic.PDF ] |
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