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PDF AD8334 Data sheet ( Hoja de datos )
| Número de pieza | AD8334 | |
| Descripción | Ultralow Noise VGAs | |
| Fabricantes | Analog Devices | |
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Data Sheet
Ultralow Noise VGAs with
Preamplifier and Programmable RIN
AD8331/AD8332/AD8334
FEATURES
Ultralow noise preamplifier (preamp)
Voltage noise = 0.74 nV/√Hz
Current noise = 2.5 pA/√Hz
3 dB bandwidth
AD8331: 120 MHz
AD8332, AD8334: 100 MHz
Low power
AD8331: 125 mW/channel
AD8332, AD8334: 145 mW/channel
Wide gain range with programmable postamp
−4.5 dB to +43.5 dB in LO gain mode
7.5 dB to 55.5 dB in HI gain mode
Low output-referred noise: 48 nV/√Hz typical
Active input impedance matching
Optimized for 10-bit/12-bit ADCs
Selectable output clamping level
Single 5 V supply operation
AD8332 and AD8334 available in lead frame chip scale package
APPLICATIONS
Ultrasound and sonar time-gain controls
High performance automatic gain control (AGC) systems
I/Q signal processing
High speed, dual ADC drivers
GENERAL DESCRIPTION
The AD8331/AD8332/AD8334 are single-, dual-, and quad-
channel, ultralow noise linear-in-dB, variable gain amplifiers
(VGAs). Optimized for ultrasound systems, they are usable as a
low noise variable gain element at frequencies up to 120 MHz.
Included in each channel are an ultralow noise preamp (LNA),
an X-AMP® VGA with 48 dB of gain range, and a selectable gain
postamp with adjustable output limiting. The LNA gain is 19 dB
with a single-ended input and differential outputs. Using a single
resistor, the LNA input impedance can be adjusted to match a
signal source without compromising noise performance.
The 48 dB gain range of the VGA makes these devices suitable
for a variety of applications. Excellent bandwidth uniformity is
maintained across the entire range. The gain control interface
provides precise linear-in-dB scaling of 50 dB/V for control
voltages between 40 mV and 1 V. Factory trim ensures excellent
part-to-part and channel-to-channel gain matching.
FUNCTIONAL BLOCK DIAGRAM
LON LOP VIP VIN
VCM
HILO
LNA
INH 19dB
VMID 3.5dB OR 15.5dB
–
48dB
ATTENUATOR
+
21dB
PA
VOH
VOL
LMD
VCM
BIAS
VGA BIAS AND
INTERPOLATOR
GAIN
CONTROL
INTERFACE
CLAMP
AD8331/AD8332/AD8334
RCLMP
ENB GAIN
Figure 1. Signal Path Block Diagram
60
VGAIN = 1V
50 VGAIN = 0.8V
HI GAIN
MODE
40 VGAIN = 0.6V
30 VGAIN = 0.4V
20
VGAIN = 0.2V
10 VGAIN = 0V
0
–10
100k
1M 10M 100M
FREQUENCY (Hz)
Figure 2. Frequency Response vs. Gain
1G
Differential signal paths result in superb second- and third-
order distortion performance and low crosstalk.
The low output-referred noise of the VGA is advantageous in
driving high speed differential ADCs. The gain of the postamp
can be pin selected to 3.5 dB or 15.5 dB to optimize gain range
and output noise for 12-bit or 10-bit converter applications. The
output can be limited to a user-selected clamping level, preventing
input overload to a subsequent ADC. An external resistor adjusts
the clamping level.
The operating temperature range is −40°C to +85°C. The
AD8331 is available in a 20-lead QSOP package, the AD8332 is
available in 28-lead TSSOP and 32-lead LFCSP packages, and
the AD8334 is available in a 64-lead LFCSP package.
Rev. I
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2003–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
Parameter
Differential
Output Offset Voltage
AD8331
AD8332, AD8334
Output Short-Circuit Current
Harmonic Distortion
AD8331
HD2
HD3
HD2
HD3
AD8332, AD8334
HD2
HD3
HD2
HD3
Input 1 dB Compression Point
Two-Tone Intermodulation Distortion (IMD3)
AD8331
AD8332, AD8334
Output Third-Order Intercept
AD8331
AD8332, AD8334
Channel-to-Channel Crosstalk (AD8332,
AD8334)
Overload Recovery
Group Delay Variation
ACCURACY
Absolute Gain Error2
Gain Law Conformance3
Channel-to-Channel Gain Matching
GAIN CONTROL INTERFACE (Pin GAIN)
Gain Scaling Factor
Gain Range
Input Voltage (VGAIN) Range
Input Impedance
Response Time
COMMON-MODE INTERFACE (PIN VCMx)
Input Resistance4
Output CM Offset Voltage
Voltage Range
AD8331/AD8332/AD8334
Test Conditions/Comments
Min Typ
4.5
Max Unit1
V p-p
Differential, VGAIN = 0.5 V
Common mode
Differential, 0.05 V ≤ VGAIN ≤ 1.0 V
Common mode
VGAIN = 0.5 V, VOUT = 1 V p-p, HI gain
−50
−125
−20
−125
±5
−25
±5
–25
45
+50
+100
+20
+100
mV
mV
mV
mV
mA
f = 1 MHz
f = 10 MHz
−88 dBc
−85 dBc
−68 dBc
−65 dBc
f = 1 MHz
f = 10 MHz
VGAIN = 0.25 V, VOUT = 1 V p-p, f = 1 MHz to 10 MHz
−82
−85
−62
−66
1
dBc
dBc
dBc
dBc
dBm
VGAIN = 0.72 V, VOUT = 1 V p-p, f = 1 MHz
VGAIN = 0.5 V, VOUT = 1 V p-p, f = 10 MHz
VGAIN = 0.72 V, VOUT = 1 V p-p, f = 1 MHz
VGAIN = 0.5 V, VOUT = 1 V p-p, f = 10 MHz
−80
−72
−78
−74
dBc
dBc
dBc
dBc
VGAIN = 0.5 V, VOUT = 1 V p-p, f = 1 MHz
VGAIN = 0.5 V, VOUT = 1 V p-p, f = 10 MHz
VGAIN = 0.5 V, VOUT = 1 V p-p, f = 1 MHz
VGAIN = 0.5 V, VOUT = 1 V p-p, f = 10 MHz
VGAIN = 0.5 V, VOUT = 1 V p-p, f = 1 MHz
VGAIN = 1.0 V, VIN = 50 mV p-p/1 V p-p, f = 10 MHz
5 MHz < f < 50 MHz, full gain range
38
33
35
32
−98
5
±2
dBm
dBm
dBm
dBm
dB
ns
ns
0.05 V < VGAIN < 0.10 V
0.10 V < VGAIN < 0.95 V
0.95 V < VGAIN < 1.0 V
0.1 V < VGAIN < 0.95 V
0.1 V < VGAIN < 0.95 V
−1 +0.5
−1 ±0.3
−2 −1
±0.2
±0.1
+2 dB
+1 dB
+1 dB
dB
dB
0.10 V < VGAIN < 0.95 V
LO gain
HI gain
48 dB gain change to 90% full scale
48.5 50
51.5 dB/V
−4.5 to +43.5
dB
7.5 to 55.5
dB
0 to 1.0
V
10 MΩ
500 ns
Current limited to ±1 mA
VCM = 2.5 V
VOUT = 2.0 V p-p
−125
30
−25
1.5 to 3.5
+100
Ω
mV
V
Rev. I | Page 5 of 55
5 Page 
Data Sheet
Pin No.
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Mnemonic
GAIN34
CLMP34
HILO
VCM4
VCM3
NC
COM34
VOH4
VOL4
VPS34
VOL3
VOH3
COM34
NC
MODE
COM12
VOH2
VOL2
VPS12
VOL1
VOH1
COM12
VCM2
VCM1
EN34
EN12
CLMP12
GAIN12
VPS1
VIN1
VIP1
LOP1
LON1
NC
LMD1
INH1
COM1
COM2
EPAD
AD8331/AD8332/AD8334
Description
Gain Control Voltage for CH3 and CH4.
Output Clamping Level Input for CH3 and CH4.
VGA Gain Range Select (HI or LO).
CH4 Common-Mode Voltage—AC Bypass.
CH3 Common-Mode Voltage—AC Bypass.
No Connect.
VGA Ground CH3 and CH4.
CH4 Positive VGA Output.
CH4 Negative VGA Output.
VGA Supply 5 V CH3 and CH4.
CH3 Negative VGA Output.
CH3 Positive VGA Output.
VGA Ground CH3 and CH4.
No Connect.
Gain Control Slope, Logic Input, 0 = Positive.
VGA Ground CH1 and CH2.
CH2 Positive VGA Output.
CH2 Negative VGA Output.
CH2 VGA Supply 5 V CH1 and CH2.
CH1 Negative VGA Output.
CH1 Positive VGA Output.
VGA Ground CH1 and CH2.
CH2 Common-Mode Voltage—AC Bypass.
CH1 Common-Mode Voltage—AC Bypass.
Shared LNA/VGA Enable CH3 and CH4.
Shared LNA/VGA Enable CH1 and CH2.
Output Clamping Level Input CH1 and CH2.
Gain Control Voltage CH1 and CH2.
CH1 LNA Supply 5 V.
CH1 VGA Negative Input.
CH1 VGA Positive Input.
CH1 LNA Positive Output.
CH1 LNA Feedback Output (for RIZ).
Not Connected.
CH 1 LNA Midsupply Pin; Connect a Capacitor for Midsupply HF Bypass.
CH1 LNA Input.
CH1 LNA Ground.
CH2 LNA Ground.
The exposed paddle must be soldered to the PCB ground to ensure proper heat dissipation,
noise, and mechanical strength benefits.
Rev. I | Page 11 of 55
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AD8334.PDF ] | |
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