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PDF CAT25160 Data sheet ( Hoja de datos )

Número de pieza CAT25160
Descripción (CAT25080 / CAT25160) 8-Kb and 16-Kb SPI Serial CMOS EEPROM
Fabricantes Catalyst Semiconductor 
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No Preview Available ! CAT25160 Hoja de datos, Descripción, Manual

CAT25080, CAT25160
8-Kb and 16-Kb SPI Serial CMOS EEPROM
FEATURES
DESCRIPTION
„ 10 MHz SPI compatible
„ 1.8V to 5.5V supply voltage range
„ SPI modes (0,0) & (1,1)
„ 32-byte page write buffer
„ Self-timed write cycle
„ Hardware and software protection
„ Block write protection
– Protect 1/4, 1/2 or entire EEPROM array
„ Low power CMOS technology
„ 1,000,000 program/erase cycles
„ 100 year data retention
„ Industrial temperature range
„ RoHS-compliant 8 lead PDIP, SOIC, TSSOP and
8-pad TDFN, UDFN packages
The CAT25080/25160 are 8-Kb/16-Kb Serial CMOS
EEPROM devices internally organized as
1024x8/2048x8 bits. They feature a 32-byte page
write buffer and support the Serial Peripheral Interface
(SPI) protocol. The device is enabled through a Chip
Select (C¯¯S) input. In addition, the required bus signals
are a clock input (SCK), data input (SI) and data
output (SO) lines. The H¯¯O¯L¯D¯ input may be used to
pause any serial communication with the
CAT25080/25160 device. These devices feature
software and hardware write protection, including
partial as well as full array protection.
www.DataSheet4U.com
PIN CONFIGURATION
PDIP (L)
SOIC (V)
TSSOP (Y)
TDFN (VP2)
UDFN (HU2)
C¯¯S 1
SO 2
8 VCC
7 H¯¯O¯L¯D¯
¯W¯P¯ 3
6 SCK
VSS 4
5 SI
PIN FUNCTION
Pin Name
C¯¯S
SO
¯W¯P¯
VSS
SI
SCK
H¯¯O¯L¯D¯
VCC
Function
Chip Select
Serial Data Output
Write Protect
Ground
Serial Data Input
Serial Clock
Hold Transmission Input
Power Supply
© 2006 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
FUNCTIONAL SYMBOL
VCC
SI
CS
WP
HOLD
SCK
CAT25080
CAT25160
GND
SO
For Ordering Information details, see page 16.
1 Doc. No. 1122 Rev. A

1 page




CAT25160 pdf
CAT25080, CAT25160
STATUS REGISTER
The Status Register, as shown in Table 2, contains a
number of status and control bits.
The ¯R¯D¯Y¯ (Ready) bit indicates whether the device is
busy with a write operation. This bit is automatically set
to 1 during an internal write cycle, and reset to 0 when
the device is ready to accept commands. For the host,
this bit is read only.
The WEL (Write Enable Latch) bit is set/reset by the
WREN/WRDI commands. When set to 1, the device is
in a Write Enable state and when set to 0, the device is
in a Write Disable state.
The BP0 and BP1 (Block Protect) bits determine which
blocks are currently write protected. They are set by the
user with the WRSR command and are non-volatile.
The user is allowed to protect a quarter, one half or the
entire memory, by setting these bits according to Table
3. The protected blocks then become read-only.
The WPEN (Write Protect Enable) bit acts as an enable
for the ¯W¯P¯ pin. Hardware write protection is enabled
when the ¯W¯P¯ pin is low and the WPEN bit is 1. This
condition prevents writing to the status register and to
the block protected sections of memory. While
hardware write protection is active, only the non-block
protected memory can be written. Hardware write
protection is disabled when the ¯W¯P¯ pin is high or the
WPEN bit is 0. The WPEN bit, ¯W¯P¯ pin and WEL bit
combine to either permit or inhibit Write operations, as
detailed in Table 4.
Table 2. Status Register
76
WPEN
0
5
0
4 3 2 10
0
BP1
BP0
WEL
¯R¯D¯Y¯
Table 3. Block Protection Bits
Status Register Bits
BP1
BP0
00
01
10
11
Array Address Protected
None
25080: 0300-03FF
25160: 0600-07FF
25080: 0200-03FF
25160: 0400-07FF
25080: 0000-03FF
25160: 0000-07FF
Protection
No Protection
Quarter Array Protection
Half Array Protection
Full Array Protection
Table 4. Write Protect Conditions
WPEN
0
0
1
1
X
X
¯W¯P¯
X
X
Low
Low
High
High
WEL
0
1
0
1
0
1
Protected
Blocks
Protected
Protected
Protected
Protected
Protected
Protected
Unprotected
Blocks
Protected
Writable
Protected
Writable
Protected
Writable
Status
Register
Protected
Writable
Protected
Protected
Protected
Writable
© 2006 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
5
Doc. No. 1122 Rev. A

5 Page





CAT25160 arduino
PACKAGE OUTLINES
8-lEAD 300MIL WIDE PLASTIC DIP (L)
E1
CAT25080, CAT25160
D
A2 A
e
b2
b
A1 L
SYMBOL
A
A1
A2
b
b2
c
D
E
E1
e
eB
L
MIN
0.38
3.05
0.36
1.14
0.21
9.02
7.62
6.09
7.87
2.92
NOM
MAX
4.57
0.46
0.26
7.87
6.35
2.54 BSC
3.81
0.56
1.77
0.35
10.16
8.25
7.11
9.65
3.81
E
c
eB
For current Tape and Reel information, download the PDF file from:
http://www.catsemi.com/documents/tapeandreel.pdf.
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC specification MS001
(3) Dimensioning and tolerancing per ANSI Y14.5M-1982.
© 2006 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
11
Doc. No. 1122 Rev. A

11 Page







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