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PDF NLVHC1GT66 Data sheet ( Hoja de datos )
| Número de pieza | NLVHC1GT66 | |
| Descripción | SPST (NO) Normally Open Analog Switch | |
| Fabricantes | ON Semiconductor | |
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MC74VHC1GT66,
NLVHC1GT66
SPST (NO) Normally Open
Analog Switch
The MC74VHC1GT66, NLVHC1GT66 is a Single Pole Single
Throw (SPST) analog switch. It achieves high speed propagation
delays and low ON resistances while maintaining low power
dissipation. This bilateral switch controls analog and digital voltages
that may vary across the full power−supply range (from VCC to GND).
The MC74VHC1GT66, NLVHC1GT66 is compatible in function to
a single gate of the High Speed CMOS MC74VHCT4066 and the
metal−gate CMOS MC14066. The device has been designed so that
the ON resistances (RON) are much lower and more linear over input
voltage than RON of the metal−gate CMOS or High Speed CMOS
analog switches.
The newer NLVHC1GT66 offers the same functionality in a
1.2x1.0x0.55 mm UDFN6 package.
The ON/OFF Control input is compatible with TTL−type input
thresholds allowing the device to be used as a logic−level translator
from 3 V CMOS logic to 5 V CMOS logic or from 1.8 V CMOS logic
to 3 V CMOS logic while operating at the high−voltage power supply.
The input protection circuitry on this device allows overvoltage
tolerance on the input, which provides protection when voltages of up
to 7 V are applied, regardless of the supply voltage. This allows the
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MC74VHC1GT66, NLVHC1GT66 to be used to interface 5 V circuits
to 3 V circuits.
Features
• High Speed: tPD = 20 ns (Typ) at VCC = 5 V
• Low Power Dissipation: ICC = 1.0 mA (Max) at TA = 25°C
• Diode Protection Provided on Inputs and Outputs
• Improved Linearity and Lower ON Resistance over Input Voltage
• On/Off Control Input Has OVT
• Chip Complexity: FETs = 11; Equivalent Gates = 3
• Pb−Free Packages are Available
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MARKING DIAGRAMS
5
1
SC−88A
DF SUFFIX
CASE 419A
5
VE M G
G
1
5
1
TSOP−5
DT SUFFIX
CASE 483
5
VE M G
G
1
UDFN6
MU SUFFIX
WW M
1
CASE 517AA
G
VE, W = Device Code
M = Date Code*
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may vary
depending upon manufacturing location.
PIN ASSIGNMENT
1 IN/OUT XA
2 OUT/IN YA
3 GND
4 ON/OFF CONTROL
5 VCC
FUNCTION TABLE
On/Off Control Input State of Analog Switch
L Off
H On
© Semiconductor Components Industries, LLC, 2007
February, 2007 − Rev. 13
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
1 Publication Order Number:
MC74VHC1GT66/D
1 page  
MC74VHC1GT66, NLVHC1GT66
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
Parameter
Test Conditions
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎBW
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎISOoff
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎNOISEfeed
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTHD
Maximum On−Channel Bandwidth
or Minimum Frequency Response
(Figure 10)
Off−Channel Feedthrough Isolation
(Figure 11)
Feedthrough Noise Control to
Switch
(Figure 12)
Total Harmonic Distortion
(Figure 13)
fin = 1 MHz Sine Wave
Adjust fin voltage to obtain 0 dBm at VOS
Increase fin = frequency until dB meter reads −3 dB
RL = 50 W
fin = Sine Wave
Adjust fin voltage to obtain 0 dBm at VIS
fin = 10 kHz, RL = 600 W
Vin ≤ 1 MHz Square Wave (tr = tf = 2ns)
RL = 600 W
fin = 1 kHz, RL = 10 kW
THD = THDMeasured − THDSource
VIS = 3.0 VPP sine wave
VIS = 5.0 VPP sine wave
VCC
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.3
5.5
Limit 25°C
150
175
180
Unit
MHz
−80
−80
−80
45
60
130
0.30
0.15
dB
mVPP
%
POWER
SUPPLY
−+
PLOTTER
COMPUTER
15
2
34
DC PARAMETER
ANALYZER
VCC
VIH
VCC
VCC
1
2
A
3
VCC
5
VIL
4
Figure 4. On Resistance Test Set−Up
Figure 5. Maximum Off−Channel Leakage Current
Test Set−Up
VCC
A
N/C
1
2
3
VCC
5
VIH
4
Figure 6. Maximum On−Channel Leakage Current
Test Set−Up
TEST
POINT
1
2
3
VCC
5
VIH
4
Figure 7. Propagation Delay Test Set−Up
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| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet NLVHC1GT66.PDF ] | |
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