Datenblatt-pdf.com


A3950 Schematic ( PDF Datasheet ) - Allegro MicroSystems

Teilenummer A3950
Beschreibung DMOS Full-Bridge Motor Driver
Hersteller Allegro MicroSystems
Logo Allegro MicroSystems Logo 




Gesamt 12 Seiten
A3950 Datasheet, Funktion
A3950
DMOS Full-Bridge Motor Driver
Features and Benefits
Low RDS(on) outputs
Overcurrent protection
Motor lead short-to-supply protection
Short-to-ground protection
Sleep function
Synchronous rectification
Diagnostic output
Internal undervoltage lockout (UVLO)
Crossover-current protection
Packages:
Package LP, 16 pin TSSOP
with Exposed Thermal Pad
Package EU, 16 pin QFN
with Exposed Thermal Pad
Description
Designed for PWM (pulse width modulated) control of dc
motors, the A3950 is capable of peak output currents to ±2.8 A
and operating voltages to 36 V.
PHASE and ENABLE input terminals are provided for use in
controlling the speed and direction of a dc motor with externally
applied PWM control signals. Internal synchronous rectification
control circuitry is provided to lower power dissipation during
PWM operation.
Internal circuit protection includes motor lead short-to-
supply / short-to-ground, thermal shutdown with hysteresis,
undervoltage monitoring of VBB and VCP, and crossover-current
protection.
TheA3950 is supplied in a thin profile (<1.2 mm overall height)
16 pin TSSOP package (LP), and a very thin (0.75 mm nominal
height) QFN package. Both packages provide an exposed pad
for enhanced thermal dissipation, and are lead (Pb) free with
100% matte tin leadframe plating.
www.DataSheet4U.com
Approximate Scale 1:1
Typical Application Diagrams
VDD
5 kΩ
0.22 μF
25 V
VBB
0.1 μF
50 V
PHASE
GND
GND
SLEEP
ENABLE
A3950
EU Package
CP2
CP1
OUTB
0.1 μF
50 V
100 μF
50 V
0.1 μF
50 V
Package EU
VDD
5 kΩ
NFAULT
MODE
PHASE
GND
SLEEP
A3950
LP Package
ENABLE
OUTA
SENSE
NC
VREG
VCP
GND
CP2
CP1
OUTB
VBB
VBB
0.22 μF
25 V
0.1 μF
50 V
0.1 μF
50 V
100 μF
50 V
0.1 μF
50 V
Package LP
A3950DS, Rev. 4






A3950 Datasheet, Funktion
A3950
DMOS Full-Bridge Motor Driver
Timing Diagram: Overcurrent Control
VOUTA
VOUTB High-Z
IPEAK
IOUTx IOCP
ENABLE,
Source
or Sink
BLANK
Charge Pump
Counter
NFAULT
tBLANK
Motor lead
short condition
tOCP
Normal dc
motor capacitance
Allegro MicroSystems, Inc.
6
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com

6 Page









A3950 pdf, datenblatt
A3950
DMOS Full-Bridge Motor Driver
LP Package, 16 Pin TSSOP with Exposed Thermal Pad
5.10 .201
4.90 .193
16
B
A
A
B
4.5 .177
4.3 .169
3 .118
NOM 6.6 .260
6.2 .244
0.20 .008
0.09 .004
0.75 .030
0.45 .018
1 .039
REF
12
3 .118
NOM
16X
0.10 [.004] C
16X
0.30
0.19
.012
.007
0.10 [.004] M C A B
0.65 .026
SEATING C
PLANE
1.20 .047
MAX
0.15 .006
0.00 .000
0.25 .010
SEATING PLANE
GAUGE PLANE
0.45 .018
NOM
1.65 .065
NOM
16
2X0.20 .008
MIN
C
14X0.20 .008
MIN
0.65 .026
NOM
3 .118
NOM
6.1 .240
NOM
12
3 .118
NOM
All dimensions reference only, not for tooling use.
(reference JEDEC MO-153 ABT)
Dimensions in millimeters
U.S. Customary dimensions (in.) in brackets, for reference only
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Exposed thermal pad (bottom surface) U.S. Customary dimensions controlling
C Reference land pattern layout (reference IPC7351
TSOP65P640X120-17M); adjust as necessary to meet
application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal
vias at the exposed thermal pad land can improve thermal
dissipation (reference EIA/JEDEC Standard JESD51-5)
The products described here are manufactured under one or more U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify
that the information being relied upon is current.
Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for
its use; nor for any infringement of patents or other rights of third parties which may result from its use.
Copyright©2005, 2006 Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc.
12
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com

12 Page





SeitenGesamt 12 Seiten
PDF Download[ A3950 Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
A3950DMOS Full-Bridge Motor DriverAllegro MicroSystems
Allegro MicroSystems
A3951FULL-BRIDGE PWM MOTOR DRIVERAllegro MicroSystems
Allegro MicroSystems
A3951SBFULL-BRIDGE PWM MOTOR DRIVERAllegro MicroSystems
Allegro MicroSystems
A3951SWFULL-BRIDGE PWM MOTOR DRIVERAllegro MicroSystems
Allegro MicroSystems
A3952SBFULL-BRIDGE PWM MOTOR DRIVERAllegro MicroSystems
Allegro MicroSystems

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche