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PDF A3969 Data sheet ( Hoja de datos )
| Número de pieza | A3969 | |
| Descripción | Dual Full-Bridge PWM Motor Driver | |
| Fabricantes | Allegro MicroSystems | |
| Logotipo |  |
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A3969
Dual Full-Bridge PWM Motor Driver
Features and Benefits
▪ ±650 mA Continuous Output Current
▪ 30 V Output Voltage Rating
▪ Internal Fixed-Frequency PWM Current Control
▪ Satlington Sink Drivers
▪ User-Selectable Blanking Window
▪ Internal Ground-Clamp and Flyback Diodes
▪ Internal Thermal-Shutdown Circuitry
▪ Crossover-Current Protection and UVLO Protection
Continued on the next page…
Package: 28 pin QFN (suffix ET)
Approximate scale
Description
The A3969 is designed to drive both windings of a two-phase
bipolar stepper motor. The device includes two H-bridges
capable of continuous output currents of ±650 mAand operating
voltages to 30 V. Motor winding current can be controlled by
the internal fixed-frequency, pulse-width modulated (PWM),
current-control circuitry. The peak load current limit is set by
the user’s selection of a reference voltage and current-sensing
resistors.
The fixed-frequency pulse duration is set by a user-selected
external RC timing network. The capacitor in the RC timing
network also determines a user-selectable blanking window that
prevents false triggering of the PWM current-control circuitry
during switching transitions.
To reduce on-chip power dissipation, the H-bridge power
outputs have been optimized for low saturation voltages. The
sink drivers feature the Allegro® patented Satlington® output
structure. The Satlington outputs combine the low voltage drop
of a saturated transistor and the high peak current capability
of a Darlington.
Continued on the next page…
Typical Application
56 kΩ
+3.3 V
+24 V
680 pF
+3.3 V
20 kΩ
10 kΩ
47 μF
EN2
PH2
0.5 Ω
1 21
2 20 0.5 Ω
3 19
4
LOGIC
LOGIC
18
5 17
6
7 VBB
16
15
EN1
PH1
DS3969
1 page  
A3969
Dual Full-Bridge PWM Motor Driver
ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 30 V, VCC = 3.0 V to 3.6 V, VREF = 1.7 V,
VS = 0 V, 56 kΩ and 680 pF RC to Ground (unless noted otherwise) (cont.)
Characteristic
Control Logic (continued)
Symbol Test Conditions
Min.
Limits
Typ. Max.
Units
PWM RC Frequency
PWM Propagation Delay Time
Cross-Over Dead Time
Propagation Delay Times
Thermal Shutdown Temp.
Thermal Shutdown Hysteresis
UVLO Enable Threshold
UVLO Hysteresis
Logic Supply Current
fosc
tPWM
tcodt
tpd
TJ
ΔTJ
VT(UVLO)+
VT(UVLO)hys
ICC(ON)
ICC(OFF)
CT = 680 pF, RT = 56 kΩ
Comparator Trip to Source OFF
Cycle Reset to Source ON
100 Ω Load to 15 V
IOUT = ±650 mA, 50% to 50%; VBB = 15 V:
ENABLE ON to Source ON
ENABLE OFF to Source OFF
ENABLE ON to Sink ON
ENABLE OFF to Sink OFF
PHASE Change to Sink ON
PHASE Change to Sink OFF
PHASE Change to Source ON
PHASE Change to Source OFF
Increasing VCC
VENABLE 1 = VENABLE 2 = 0.8 V
VENABLE 1 = VENABLE 2 = 2.4 V
NOTES:
1. Typical Data is for design information only.
2. Negative current is defined as coming out of (sourcing) the specified device terminal.
22.9
—
—
0.2
—
—
—
—
—
—
—
—
—
—
—
0.07
—
—
25.4
1.0
0.8
1.3
125
500
200
200
1500
200
1500
200
165
15
2.75
0.10
—
—
27.9
1.4
1.2
3.0
—
—
—
—
—
—
—
—
—
—
3.0
—
50
9.0
kHz
μs
μs
μs
ns
ns
ns
ns
ns
ns
ns
ns
°C
°C
V
V
mA
mA
Allegro MicroSystems, Inc.
5
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet A3969.PDF ] | |
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