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GP521 Schematic ( PDF Datasheet ) - Gennum Corporation

Teilenummer GP521
Beschreibung General Purpose Controller / Memory Chip
Hersteller Gennum Corporation
Logo Gennum Corporation Logo 




Gesamt 8 Seiten
GP521 Datasheet, Funktion
www.DataSheet4U.com
General Purpose
Controller / Memory Chip
for Hearing Instruments
FEATURES
general purpose
EEPROM non-volatile memory
8 programmable current sink (PCS) control outputs
can be configured with 6 PCS outputs for hearing
instruments (two switchable, four non-switchable)
status register
data transmission error detection
synchronization of GP521 internal clocks with program
unit clock
STANDARD PACKAGING
• Chip (129 x 112 mils)
Au Bump
DESCRIPTION
The GP521 is a general purpose controller/memory chip in-
tended for use with audio signal path circuits in programmable
hearing instruments.
The GP521 uses a flexible communication standard which
allows room for future growth in programmable functions for
hearing instruments. The communication with the program unit
is over a bi-directional serial data link. Error detection circuitry
is used to avoid undesired changes in programmed settings.
GP521 - DATA SHEET
An information transfer dialogue consists of the address and
data for a register sent to the GP521 and the register contents
returned by the GP521. The function controlled by an output of
the GP521 is defined by the signal path circuit allowing current
controlled parameters. The relationship between the GP521
register addresses and the function on the signal path circuit
is defined by a data file in the programming unit. With this
format, any software developed for the GP521 can be used for
future generations of Gennum’s controller/memory circuits
and audio signal path circuits.
The GP521 uses EEPROM cells as the long term memory
element. These cells will retain the stored data when the power
supply is disconnected. Each EEPROM cell is combined with
a temporary (RAM) memory cell which makes it possible to
evaluate various control settings prior to saving them in the
long term EEPROM memory.
The GP521 controls the audio signal path circuit using eight
Programmable Current Sinks (PCS). Each PCS has 16 pro-
grammable settings. The circuit can be configured for either 6
or 8 PCS outputs. When used with a single pole single throw
switch (SPST) under the 6 PCS configuration , it is possible to
design a hearing instrument with two programmed settings
(i.e. adjusting a low cut filter for either noisy or quiet back-
ground environments). The 8 output configuration may be
used for circuits that require more programmable but non-
switchable settings. An external reference current is used for
the PCS’s so that the PCS outputs can track with the currents
in the audio signal path circuit.
BLOCK DIAGRAM
IO1
10
IO2
9
CONTROL OUTPUTS
CONTROL OUTPUTS
IO3 IO4 IO5 IO6
8 7 15 13
IO7
12
IO8
11
4 BIT
EEPROM
DAC
V
CC 3
GND 5
4 BIT
EEPROM
DAC
4 BIT
EEPROM
DAC
4 BIT
EEPROM
DAC
4 BIT
EEPROM
DAC
4 BIT
EEPROM
DAC
4 BIT
EEPROM
DAC
4 BIT
EEPROM
DAC
REFERENCE
CURRENT
17 I RIR
2
DATA
SERIAL TO PARELLEL
CONVERSION
DATA ERROR CHECKING
CONTROLLER TIMING
EEPROM
VOLTAGE
MULTIPLIER
STATUS &
OPERATION
REGISTER
1
CLOCK
Revision Date: May 1998
4
SW OFF
6
OS1
OSCILLATOR
16
N/C
14
N/C
Document No. 510 - 79 - 06
GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 tel. +1 (905) 632-2996
Web Site: www.gennum.com E-mail: [email protected]






GP521 Datasheet, Funktion
GP521 REGISTERS
There are four types of registers used in the GP521. Their
functions are described as follows:
ID - Hearing instruments identification register. The
contents are set to 0000000 indicating a visual identification
is required.
STATUS - Monitors the present state of the GP521
and records whether an error has occurred in the
previous dialogue with the program unit. The STATUS is
read only register.
OPERATION - Performs EEPROM read to (write from)
RAM operations. The desired operation is specified by the
data sent to the register. This is write-only register.
PCS - Stores the programmable current sink settings.
The register address definitions and the data bit definitions are
given in Tables 2 and 3. The STATUS and OPERATION
registers are two different registers sharing a common address.
TABLE 2 REGISTER ADDRESS DEFINITIONS
ADDRESS FUNCTION
0000000 ID
TYPE
read only
MEMORY CELL
ROM*
0000001 STATUS/OP read/write RAM / ROM
0000010
to
unused*
0000111
0001000
0001001
0001010
0001011
0001100
0001101
0001110
0001111
0010000
to
PCS IO1
PCS IO2
PCS IO3
PCS IO4
PCS IO5
PCS IO6
PCS IO7
PCS IO8
unused*
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
RAM +EEPROM
RAM +EEPROM
RAM +EEPROM
RAM +EEPROM
RAM +EEPROM
RAM +EEPROM
RAM +EEPROM
RAM +EEPROM
1111111
*The GP521 will indicate an error if an unused register is accessed
or a write to is attempted to a read-only register.
TABLE 3 DATA BIT DEFINITIONS
DATA BIT
0000000
XXXXXX1
XXXXX1X
XXXX1XX
XXX1XXX
XX1XXXX
X1XXXXX
1XXXXXX
STATUS REGISTER
PCS outputs may be different than
EEPROM values
Circuit busy with EEPROM write
Transmission error on previous dialogue
Bad Address and/or Operation Error
on previous dialogue
unused
unused
unused
OPERATION REGISTER
No operation
Load EEPROM values into PCS
Save PCS values in EEPROM memory
unused
unused
unused
unused
unused
PCS REGISTER*
set IO= 0
set IO= 0.125 IR
set IO= 0.25 IR
set IO= 0.5 IR
set IO= 1.0 IR
unused
unused
unused
*Note: 1. Combining data bits in a word is equivalent to combining the corresponding definitions.
(i.e. 0001101 in the PCS register would set the output to IO =1.625 IR ).
2. The upper 3 data bits are ignored except for parity checking.
510 - 79 - 06
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