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PDF DAC8830 Data sheet ( Hoja de datos )
| Número de pieza | DAC8830 | |
| Descripción | (DAC8830 / DAC8831) Voltage-Output Digital-to-Analog Converters | |
| Fabricantes | Burr-Brown | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de DAC8830 (archivo pdf) en la parte inferior de esta página. Total 29 Páginas | ||
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BurrĆBrown Products
from Texas Instruments
IVC102
OPA132
DAC8831 ®
DAC8830
DAC8831
SLAS449C – FEBRUARY 2005 – REVISED NOVEMBER 2006
16-Bit, Ultra-Low Power, Voltage-Output
Digital-to-Analog Converters
FEATURES
• 16-Bit Resolution
• 2.7 V to 5.5 V Single-Supply Operation
• Very Low Power: 15 µW for 3 V Power
• High Accuracy, INL: 1 LSB
• Low Glitch: 10 nV-s
• Low Noise: 10 nV/√Hz
• Fast Settling: 1.0 µS
• Fast SPI™ Interface, up to 50 MHz
• Reset to Zero-Code
• Schmitt-Trigger Inputs for Direct Optocoupler
Interface
• Industry-Standard Pin Configuration
APPLICATIONS
• Portable Equipment
• Automatic Test Equipment
• Industrial Process Control
• Data Acquisition Systems
• Optical Networking
DESCRIPTION
The DAC8830 and DAC8831 are single, 16-bit,
serial-input, voltage-output digital-to-analog
converters (DACs) operating from a single 3 V to 5 V
power supply. These converters provide excellent
linearity (1 LSB INL), low glitch, low noise, and fast
settling (1.0 µS to 1/2 LSB of full-scale output) over
the specified temperature range of –40°C to +85°C.
The output is unbuffered, which reduces the power
consumption and the error introduced by the buffer.
These parts feature a standard high-speed (clock up
to 50 MHz), 3 V or 5 V SPI serial interface to
communicate with the DSP or microprocessors.
The DAC8830 output is 0 V to VREF. However, the
DAC8831 provides bipolar output (±VREF) when
working with an external buffer. The DAC8830 and
DAC8831 are both reset to zero-code after power
up. For optimum performance, a set of Kelvin
connections to external reference and analog ground
input are provided on the DAC8831.
The DAC8830 is available in an SO-8 package, and
the DAC8831 in an SO-14 package. Both have
industry standard pinouts (see Table 3, the
cross-reference table in the Application Information
section for details). The DAC8831 is also available in
a QFN-14 package.
VREF
CS
SCLK
SDI
DAC8830
Functional Block Diagram
VDD
Input
Register
DGND
DAC
VOUT
AGND
DAC Latch
DAC8830
LDAC
CS
SCLK
SDI
DAC8831
Functional Block Diagram
VDD
VREF−S VREF−F
RINV RFB
DAC
Input
Register
DAC Latch
RFB
INV
VOUT
+V
−
+
VO
−V
OPA277
AGNDF OPA704
AGNDS OPA727
DAC8831
DGND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SPI, QSPI are trademarks of Motorola, Inc.
Microwire is a trademark of National Semiconductor Corp.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2006, Texas Instruments Incorporated
1 page  
www.ti.com
DAC8830
DAC8831
SLAS449C – FEBRUARY 2005 – REVISED NOVEMBER 2006
PIN CONFIGURATION (NOT TO SCALE)
D PACKAGE
SO-8
(TOP VIEW)
D PACKAGE
SO-14
(TOP VIEW)
RGY PACKAGE
QFN-14
(TOP VIEW)
VOUT
AGND
VREF
CS
1
2
3
4
8 VDD
7 DGND
6 SDI
5 SCLK
RFB
VOUT
AGNDF
AGNDS
VREF−S
VREF−F
CS
1
2
3
4
5
6
7
14 VDD
13 INV
12 DGND
13 12 11 10 9
11 LDAC
10 SDI
VDD 14
8 SCLK
9 NC
8 SCLK
DAC8831
Thermal Pad(1)
RFB 1
7 CS
23 45 6
NOTE: (1) Exposed thermal pad in the QFN package
must be connected to analog ground.
TERMINAL
NO. NAME
DAC8830
1 VOUT
2 AGND
3 VREF
4 CS
5 SCLK
6 SDI
7 DGND
8
DAC8831
VDD
1 RFB
2 VOUT
3 AGNDF
4 AGNDS
5 VREF–S
6 VREF–F
7 CS
8 SCLK
9 NC
10 SDI
11 LDAC
12 DGND
13 INV
14 VDD
TERMINAL FUNCTIONS
DESCRIPTION
Analog output of DAC
Analog ground
Voltage reference input
Chip select input (active low). Data is not clocked into SDI unless CS is low
Serial clock input
Serial data input. Data is latched into input register on the rising edge of SCLK.
Digital ground
Analog power supply, +3 V to +5 V
Feedback resistor. Connect to the output of external operational amplifier in bipolar mode.
Analog output of DAC
Analog ground (Force)
Analog ground (Sense)
Voltage reference input (Sense). Connect to external voltage reference
Voltage reference input (Force). Connect to external voltage reference
Chip select input (active low). Data is not clocked into SDI unless CS is low.
Serial clock input.
No internal connection
Serial data input. Data is latched into input register on the rising edge of SCLK.
Load DAC control input. Active low. When LDAC is Low, the DAC latch is simultaneously updated with the
content of the input register.
Digital ground
Junction point of internal scaling resistors. Connect to external operational amplifier inverting input in bipolar
mode.
Analog power supply, +3 V to +5 V.
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5
5 Page 
DAC8830
DAC8831
www.ti.com
SLAS449C – FEBRUARY 2005 – REVISED NOVEMBER 2006
TYPICAL CHARACTERISTICS: VDD = +5 V (continued)
At TA = +25°C and VREF = +2.5 V, unless otherwise noted.
5V/div
MAJOR-CARRY GLITCH
(FALLING)
LDAC
VREF = 2.5 V
5V/div
MAJOR-CARRY GLITCH
(RISING)
LDAC
VREF = 2.5 V
0.1V/div
VOUT
0.1V/div
VOUT
5V/div
1V/div
Time (0.5µs/div)
Figure 21.
DAC SETTLING TIME
(FALLING)
LDAC
VREF = 2.5 V
5V/div
Time (0.5µs/div)
Figure 22.
DAC SETTLING TIME
(RISING)
LDAC
VREF = 2.5 V
VOUT
Time (0.2µs/div)
Figure 23.
5V/div
VOUT
1V/div
DIGITAL
FEEDTHROUGH
SDI
Time (0.2µs/div)
Figure 24.
VREF = 2.5 V
20mV/div
VOUT
Time (50ns/div)
Figure 25.
Submit Documentation Feedback
11
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet DAC8830.PDF ] | |
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