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PDF 33897 Data sheet ( Hoja de datos )

Número de pieza 33897
Descripción Single Wire CAN Transceiver
Fabricantes Freescale Semiconductor 
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No Preview Available ! 33897 Hoja de datos, Descripción, Manual

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Freescale Semiconductor
Advance Information
Document Number: MC33897
Rev. 15.0, 10/2006
Single Wire CAN Transceiver
The 33897 Series provides a physical layer for digital
communications purposes using a Carrier Sense Multiple Access/
Collision Resolution (CSMA/CR) data link operating over a single
wire medium. This is more commonly referred to as Single Wire
Controller Area Network (CAN).
The 33897 Series operates directly from a vehicle's 12 V battery
system or a broad range of DC-power sources. It can operate at
either low or high (33.33 kbps or 83.33 kbps) data rates. A high-
voltage wake-up feature allows the device to control the regulator
used in support of the MCU and other logic. The device includes a
control terminal that can be used to put the module regulator into
Sleep mode. The presence of a defined wake-up voltage level on the
bus will reactivate the control line to turn the regulator and the system
back on.
The device complies with the GMW3089v2.4 General Motors
Corporation specification.
33897/A/B/C/D/T
SINGLE WIRE CAN
TRANSCEIVER
D SUFFIX
EF (PB-FREE) SUFFIX
98ASB42565B
14-TERMINAL SOICN
EF (PB-FREE) SUFFIX
98ASB42564B
8-TERMINAL SOICN
Features
• Waveshaping for Low Electromagnetic Interference (EMI)
• Detects and Automatically Handles Loss of Ground
• Worst-Case Sleep Mode Current of Only 60 µA (75 µA on the 33897T)
• Current Limit Prevents Damage Due to Bus Shorts
• Built-In Thermal Shutdown on Bus Output
• Protected Against Vehicular Electrical Transients
• Undervoltage Lockout Prevents False Data with Low Battery
• Pb-Free Packaging Designated by Suffix Code EF
ORDERING INFORMATION
Contains Lead
Pb-Free
RoHS
MC33897D/R2
MC33897AD/R2
MC33897EF/R2
MC33897AEF/R2
MC33897BEF/R2
*Recommended device for all new designs
MCZ33897EF/R2
MCZ33897TEF/R2
MCZ33897AEF/R2
*MCZ33897CEF/R2
MCZ33897BEF/R2
*MCZ33897DEF/R2
Temperature
Range (TA)
Package
-40°C to 125°C
14 SOICN
8 SOICN
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2006. All rights reserved.

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33897 pdf
PIN CONNECTIONS
PIN CONNECTIONS
GND
TXD
MODE0
MODE1
RXD
NC
GND
33897/A/C/T
1 14
2 13
3 12
4 11
5 10
69
78
GND
NC
BUS
LOAD
VBATT
CNTL
GND
TXD
MODE0
MODE1
RXD
33897B/D
11 88
22 77
33 66
44 55
GND
BUS
LOAD
VBATT
Figure 4. 33897/A/B/C/D/T Pin Connections
Table 2. Pin Definitions
A functional description of each terminal can be found in the Functional Pin Description section, beginning on page 13.
33897/A/C/T
Terminal
33897B/D
Terminal
Pin Name
Formal Name
Definition
1, 7, 8, 14
8
GND
Ground
Electrical Common Ground and Heat removal. A good thermal path
will also reduce the die temperature.
2
1
TXD
Transmit Data
Data input here will appear on the BUS terminal. A logic [0] will assert
the bus, a logic [1] will make the bus go to the recessive state.
3, 4
2, 3 MODE0,
Mode Control
These Pins control Sleep Mode, Transmit Level, and Speed. They
MODE1
have weak pulldowns.
5
4
RXD
Receive Data
Open drain output of the data on BUS. A recessive bus = a logic [1], a
dominant bus = logic [0]. An external pullup is required.
6, 13 – NC
No Connect
No internal connection to these Pins. Pin 13 can be connected to GND
to allow the use of the 14-terminal or 8-terminal device. (1)
9
– CNTL
Control
Provides a battery-level logic signal.
10
5 VBATT
Battery
Power input. An external diode is needed for reverse battery
protection.
11 6 LOAD
Load
The external bus load resistor connects here to prevent bus pullup in
the event of loss of module ground.
12 7 BUS
Bus This terminal connects to the bus through external components.
Notes
1. Module boards can be planned for the 14-terminal package and still use the 8-terminal package.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33897/A/B/C/D/T
5

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33897 arduino
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 5. Dynamic Electrical Characteristics (continued)
Characteristics noted under conditions of -40°C TA 125°C, unless otherwise stated. Voltages are relative to GND unless
otherwise noted. All positive currents are into the terminal. All negative currents are out of the terminal.
Characteristic
Symbol Min Typ Max Unit
BUS (CONTINUED)
High-Voltage Rising Output Delay
200 Ω ≤ RL 3332 , 1.0 µs Load Time Constants 4.0 µs
Measured from TXD=VIL to VBUS as follows:
Max Time to VBUSMOD = 3.7 V, 6.0 V VBATT 26.5 V (14)
Min Time to VBUSMOD = 1.0 V, 6.0 V VBATT 26.5 V (14)
Max Time to VBUSMOD = 9.4 V, 12.0 V VBATT 26.5 V (14)
High-Voltage Falling Output Delay
200 Ω ≤ RL 3332 , 1.0 µs Load Time Constants 4.0 µs,
12.0 V VBATT 26.5 V
Measured from TXD=VIH to VBUS as follows:
Max Time to VBUSMOD = 1.0 V (14)
Min Time to VBUSMOD = 3.7 V (14)
t DLYHVRO
µs
2.0 – 6.3
2.0 – 6.3
2.0 – 18
t DLYHVFO
µs
1.8 – 14
1.8 – 14
RECEIVER RXD
Receive Delay Time (5.0 V VBATT 26.5 V)
Awake
t RDLY
µs
0.2 – 1.0
Receive Delay Time (BUS Rising to RXD Falling, 5.0 V VBATT 26.5 V)
t RDLYSL
µs
Sleep
10 – 70
CNTL
CNTL Falling Delay Time (5.0 V VBATT 26.5 V) (33897/A/C/T only)
Notes
14. VBUSMOD is the voltage at the BUSMOD node in Figure 7, page 15.
t CNTLFDLY
300
1000
ms
Analog Integrated Circuit Device Data
Freescale Semiconductor
33897/A/B/C/D/T
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