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PDF PE97632 Data sheet ( Hoja de datos )
| Número de pieza | PE97632 | |
| Descripción | 3.0 GHz Delta-Sigma modulated Fractional-N PLL Frequency Synthesizer | |
| Fabricantes | Peregrine Semiconductor | |
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Product Description
Peregrine’s PE97632 is a high performance fractional-N PLL
capable of frequency synthesis up to 3.2 GHz. The device is
designed for superior phase noise performance while providing
an order of magnitude reduction in current consumption, when
compared with the existing commercial space PLLs.
The PE97632 features a 10/11 dual modulus prescaler,
counters, a delta sigma modulator, and a phase comparator as
shown in Figure 1. Counter values are programmable through
either a serial interface or directly hard-wired.
The PE97632 is optimized for commercial space applications.
Single Event Latch up (SEL) is physically impossible and
Single Event Upset (SEU) is better than 10-9 errors per bit /
day. Fabricated in Peregrine’s patented UTSi® (Ultra Thin
Silicon) CMOS technology, the PE97632 offers excellent RF
performance and intrinsic radiation tolerance.
Advance Information
PE97632
3.2 GHz Delta-Sigma modulated
Fractional-N Frequency Synthesizer
for Low Phase Noise Applications
Features
• 3.2 GHz operation
• ÷10/11 dual modulus prescaler
• Phase detector output
• Serial or Direct mode access
• Frequency selectivity: Comparison
frequency / 218
• Low power — 50 mA at 3.3 V
• Rad-Hard
• Ultra-low phase noise
• 68-lead CQFJ
Figure 1. Block Diagram
Fin
Fin
M8:0
A3:0
R5:0
Pre_en
20
Sdata
Primary
21-bit
Latch
fr
K17:0
Direct
Prescaler
10/11
Secon-
dary
20-bit
Latch
Auxilia-
ry
20-bit
Latch
18
20
18
Main
Counter
13
+
19
4
DSM
13
66
R Counter
Phase
Detector
PD_U
PD_D
Document No. 70-0205-01 │ www.psemi.com
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 16
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PE97632
Advance Information
Table 2. Absolute Maximum Ratings
Symbol Parameter/Conditions Min Max
VDD Supply voltage
VI Voltage on any input
II DC into any input
-0.3 4.0
-0.3
VDD +
0.3
-10 +10
IO DC into any output
-10 +10
Tstg Storage temperature range -65 150
Units
V
V
mA
mA
°C
Table 3. Operating Ratings
Symbol Parameter/Conditions Min Max Units
VDD Supply voltage
TA
Operating ambient
temperature range
2.85 3.45
-40 85
V
°C
Table 4. ESD Ratings
Symbol
Parameter/Conditions
VESD
ESD voltage human body model
(Note 1)
Level Units
1000
V
Note 1: Periodically sampled, not 100% tested. Tested per MIL-
STD-883, M3015 C2
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 4.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Document No. 70-0205-01 │ www.psemi.com
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 16
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PE97632
Advance Information
Figure 4. Serial Interface Mode Timing Diagram
Sdata
E_WR
Sclk
tEC
S_WR
tDSU
tDHLD
tClkH
tClkL
tCE
tCWR
tPW tWRC
Enhancement Register
The functions of the enhancement register bits are shown below with all bits active “high”.
Table 10. Enhancement Register Bit Functionality
Bit Function
Bit 0
Bit 1
Reserve **
Reserve **
Bit 2
Bit 3
fp output
Power down
Bit 4
Bit 5
Counter load
MSEL output
Bit 6
Bit 7
fc output
LD Disable
Description
Reserved.
Reserved.
Drives the M counter output onto the Dout output.
Power down of all functions except programming interface.
Immediate and continuous load of counter programming.
Drives the internal dual modulus prescaler modulus select (MSEL) onto the Dout output.
Drives the reference counter output onto the Dout output.
Disables the LD pin for quieter operation.
** Program to 0
Document No. 70-0205-01 │ www.psemi.com
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet PE97632.PDF ] | |
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