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PEF2045 Schematic ( PDF Datasheet ) - Siemens Semiconductor

Teilenummer PEF2045
Beschreibung Memory Time Switch CMOS
Hersteller Siemens Semiconductor
Logo Siemens Semiconductor Logo 




Gesamt 30 Seiten
PEF2045 Datasheet, Funktion
www.DataSheet4U.com
Memory Time Switch CMOS
(MTSC)
PEB 2045
PEF 2045
Preliminary Data
CMOS IC
1 Features
q Time/space switch for 2048-, 4096- or 8192-kbit/s PCM
systems
q Switching of up to 512 incoming PCM channels to up to
256 outgoing PCM channels
q 16-input and 8-output PCM lines
q Different kinds of modes (2048, 4096, 8192 kbit/s or mixed
mode)
q Configurable for primary access and standard applications
q Programmable clock shift with half clock step resolution for
input and output in primary access configuration
q Configurable for a 4096- and 8192-kHz device clock
q Tristate function for further expansion and tandem
operation
q Tristate control signals for external drivers in primary
access configuration
q 2048-kHz clock output in primary access configuration
q Space switch mode
q 8-bit µP interface
q Single + 5 V power supply
q Advanced low power CMOS technology
q Pin and software compatible to the PEB 2040
P-LCC-44
P-DIP-40
Type
PEB 2045-N
PEB 2045-P
PEF 2045-N
PEF 2045-P
Version
VA3
VA3
VA3
VA3
Ordering Code
Q67100-H8602
Q67100-H8322
Q67100-H6055
Q67100-H6056
Package
P-LCC-44 (SMD)
P-DIP-40
P-LCC-44 (SMD)
P-DIP-40
Semiconductor Group
1
01.94






PEF2045 Datasheet, Funktion
PEB 2045
PEF 2045
1.3 Device Overview
The Siemens Memory Time Switch PEx 2045 is a monolithic CMOS circuit connecting any of 512
incoming PCM channels to any of 256 outgoing PCM channels. The on-chip connection memory is
accessed via the 8-bit µP interface.
The PEx 2045 is fabricated using the advanced CMOS technology from Siemens and is mounted
in a P-DIP-40 or a P-LCC-44 package. Inputs and outputs are TTL-compatible.
The PEx 2045 is pin and software compatible to the PEB 2040. In addition, it includes the following
features:
q 4096-kHz device clock
q 4096-kbit/s PCM-data rate
q Primary access configuration
q Fast connection memory access
1.4 System Integration
The main application fields for the PEx 2045 are in switches and primary access units. Figure 3
shows a non-blocking switch for 512 input and 512 output channels using only two devices.
Figure 4 shows how 8 devices can be arranged to form a non-blocking 1024-channel switch.
PCM IN
2 MHz
16
PEx 2045
PEx 2045
8
PCM OUT
2 MHz
8
ITS00583
Figure 3
Memory Time Switch 16/16 for a Non-Blocking 512-Channel Switch
This is possible due to the tristate capability of the PEx 2045.
Semiconductor Group
6

6 Page









PEF2045 pdf, datenblatt
PEB 2045
PEF 2045
DB7-
DB0
A0 µP
Interface
MOD
STA
IAR Connection
Memory
CM
CSR
CGR
Timing Control
SP CLK
Input Buffer
Speech Memory
SM
Output Buffer
ITB00585
Figure 5
Block Diagram of the PEx 2045
Semiconductor Group
12

12 Page





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