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DZPD6722 Schematic ( PDF Datasheet ) - Intel Corporation

Teilenummer DZPD6722
Beschreibung (DZPD6710 / DZPD6722) ISA-to-PC-Card (PCMCIA) Controllers
Hersteller Intel Corporation
Logo Intel Corporation Logo 




Gesamt 30 Seiten
DZPD6722 Datasheet, Funktion
www.DataSheet4U.com
PD6710/’22
ISA-to-PC-Card (PCMCIA) Controllers
Datasheet
The PD6710 and PD6722 are single-chip PC Card (PCMCIA) controller solutions capable of
controlling one (PD6710) or two (PD6722) PC Card sockets. The chips are compliant with PC
Card Standard, PCMCIA 2.1, and JEIDA 4.1 and are optimized for use in embedded
applications and notebook/handheld/mobile computer systems where reduced form factor and
low power consumption are critical design objectives. With the PD6710, a complete PC Card
solution with power-control logic can occupy less than 1.5 square inches (excluding the socket
connector). With the PD6722, a complete dual-socket PC Card solution with power-control
logic can occupy less than 2 square inches (excluding socket connectors).
The chips employ energy-efficient mixed-voltage technology that can reduce system power
consumption by over 50 percent. The chips also provide: a Low-Power Dynamic mode, which
automatically stops the internal clock during periods of card inactivity; a software-controlled
Suspend mode, which dramatically reduces power by disabling most of the internal circuitry and
stopping data transactions to the PC Cards; and a hardware-controlled Super Suspend mode,
which reduces current to the µA range.
Personal computer applications typically access PC Cards through a third-party socket/card-
services software interface. To assure full compatibility with industry-standard socket/card-
services software and PC Card applications, the register set in the PD6710 and PD6722 is a
superset of the Intel82365SL register set.
The chips provide fully buffered PC Card interfaces, meaning that no external logic is required
for buffering signals to/from the interface, and power consumption can be controlled by limiting
signal transitions on the PC Card bus.
As of May 2001, this document replaces the Basis Communications
Corp. document CL-PD6710/’22 — ISA-to-PC-Card Host Adapters.
May 2001






DZPD6722 Datasheet, Funktion
PD6710/22 ISA-to-PC-Card (PCMCIA) Controllers
Figures
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System Block Diagram........................................................................................ 10
PC Card Controller Form Factor ......................................................................... 10
PD6710 Pin Diagram ......................................................................................... 13
PD6722 Pin Diagram .......................................................................................... 14
Memory Window Organization ............................................................................ 29
I/O Window Organization .................................................................................... 29
Functional Block Diagram ................................................................................... 30
Indexed 8-Bit Register Structure ......................................................................... 37
Indexed 8-Bit Register Example.......................................................................... 37
Device/Socket/Register Index Space.................................................................. 42
Pulse Mode Interrupts ......................................................................................... 71
Selection of Acknowledge Time-out Interval ....................................................... 80
Example GPSTB Write Port (Extension Control 2 bits 4:3 are 10) .................... 93
Example GPSTB Read Port (Extension Control 2 bits 4:3 are 01).................... 93
VS1# and VS2# Sensing on a PD6722
(Socket B Extension Control 2 bit 3 is 1) ........................................................... 96
DMA Handshake Connections to the ISA Bus
to Make the PD6722 DMA-Capable.................................................................... 98
Card DMA Request and Acknowledge Handshake with Terminal Count ........... 99
Bus Timing ISA Bus...................................................................................... 106
Reset Timing ..................................................................................................... 107
Pulse Mode Interrupt Timing ............................................................................. 108
General-Purpose Strobe Timing ....................................................................... 108
Input Clock Specification................................................................................... 109
Memory Read/Write Timing .............................................................................. 111
Word I/O Read/Write Timing ............................................................................. 113
PC Card Read/Write Timing When System Is 8-Bit (SBHE Tied High) ............ 114
Normal Byte Read/Write Timing........................................................................ 115
16-Bit System to 8-Bit I/O Card: Odd Byte Timing ............................................ 116
DMA Read Cycle Timing................................................................................... 117
DMA Write Cycle Timing ................................................................................... 119
DMA Request Timing ........................................................................................ 120
6 Datasheet

6 Page









DZPD6722 pdf, datenblatt
PD6710/22 ISA-to-PC-Card (PCMCIA) Controllers
3.0
Pin Information
The PD6710 is available in a 144-pin VQFP (very tight-pitch quad flat pack) component package
and the PD6722 is available in either a 208-pin PQFP (plastic quad flat pack) component package
or a 208-pin VQFP component package. The interface pins can be divided into five groups:
ISA (or ISA-like) bus interface pins
PC Card socket interface pins (one or two sets)
General-purpose strobe / voltage sense pins
Power control pins
Power and ground pins
Refer to Figure 3 for the PD6710 and Figure 4 for the PD6722 pin diagrams. The pin assignments
for the groups of interface pins are shown in Table 1 through Table 5.
12 Datasheet

12 Page





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