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Número de pieza | DS1265AB | |
Descripción | 8M Nonvolatile SRAM | |
Fabricantes | Maxim Integrated Products | |
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DS1265Y/AB
8M Nonvolatile SRAM
FEATURES
§ 10 years minimum data retention in the
absence of external power
§ Data is automatically protected during power
loss
§ Unlimited write cycles
§ Low-power CMOS operation
§ Read and write access times as fast as 70 ns
§ Lithium energy source is electrically
disconnected to retain freshness until power is
applied for the first time
§ Full ±10% VCC operating range (DS1265Y)
§ Optional ±5% VCC operating range
(DS1265AB)
§ Optional industrial temperature range of
-40°C to +85°C, designated IND
PIN ASSIGNMENT
NC
NC
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36 VCC
35 A19
34 NC
33 A15
32 A17
31 WE
30 A13
29 A8
28 A9
27 A11
26 OE
25 A10
24 CE
23 DQ7
22 DQ6
21 DQ5
20 DQ4
19 DQ3
36-Pin ENCAPSULATED PACKAGE
740-mil EXTENDED
PIN DESCRIPTION
A0 - A19
- Address Inputs
DQ0 - DQ7
- Data In/Data Out
CE - Chip Enable
WE - Write Enable
OE - Output Enable
VCC
GND
- Power (+5V)
- Ground
NC - No Connect
DESCRIPTION
The DS1265 8M Nonvolatile SRAMs are 8,388,608-bit, fully static nonvolatile SRAMs organized as
1,048,576 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control
circuitry which constantly monitors VCC for an out-of-tolerance condition. When such a condition occurs,
the lithium energy source is automatically switched on and write protection is unconditionally enabled to
prevent data corruption. There is no limit on the number of write cycles which can be executed and no
additional support circuitry is required for microprocessor interfacing.
1 of 8
110602
1 page TIMING DIAGRAM: WRITE CYCLE 1
DS1265Y/AB
TIMING DIAGRAM: WRITE CYCLE 2
SEE NOTES 2, 3, 4, 6, 7, 8 AND 13
5 of 8
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet DS1265AB.PDF ] |
Número de pieza | Descripción | Fabricantes |
DS1265AB | 8M Nonvolatile SRAM | Maxim Integrated Products |
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