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PDF CS44210 Data sheet ( Hoja de datos )
| Número de pieza | CS44210 | |
| Descripción | DIGITAL PWM CONTROLLER | |
| Fabricantes | Cirrus Logic | |
| Logotipo |  |
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CS44210
Digital PWM Controller with Headphone Monitor
Features
l Up to 100 dB Dynamic Range
l 2.4 V to 5.0 V supply
l Sample rates up to 96 kHz
l Digital Tone Control
—3 selectable HPF and LPF corner frequencies
—12 dB boost for bass and treble - 1 dB step size
l Programmable Digital volume control
—+18 to -96 dB in 1 dB steps
l Peak signal soft limiting
l De-emphasis for 32 kHz, 44.1 kHz, and 48
kHz
l Selectable outputs for each channel including
—Channel A: R, L, mono (L + R) / 2, mute
—Channel B: R, L, mono (L + R) / 2, mute
l PWM PopGuard®
Description
The CS44210 is a complete stereo digital-to-PWM Class D au-
dio amplifier system controller including interpolation, volume
control, half bridge PWM driver outputs, and an integrated
CS44L10 headphone amplifier in a 24-pin TSSOP package.
The CS44210 architecture uses a direct-to-digital approach
that maintains digital signal integrity to the final output filter.
This minimizes analog interference effects that can negatively
affect system performance.
The CS44210 contains on-chip digital bass and treble boost,
peak signal limiting, and de-emphasis. The PWM amplifier can
achieve greater than 90% efficiency. This efficiency leads to
longer battery life for portable systems, smaller device pack-
age, less heat sink requirements, and smaller power supplies.
The CS44210 provides all the controls necessary to drive high-
er voltage output stages for increased power levels.
The CS44210 is ideal for integrated, mult-function systems
such as shelf-top audio systems, audio mini systems, audio
video receivers (AVR), boom boxes and powered speakers.
ORDERING INFORMATION
CS44210-KZ -10 to 70 °C 24-pin TSSOP
VL
SDIN1
SDIN2
SDIN3
SCLK
LRCK
S C L /C C L K /D IF 0
AD1/CDOUT
AD0/CS/DIF1
SDA/CDIN/DEM
Control Port
Multibit ∆Σ
Modulator with
Correction
PW M
Conversion
Input
MUX
and
Serial
Port
Digital Volume
Control,
B a ss/T re b le
Boost,
C o m p r e ssio n
L im itin g ,
D e -e m p h a sis
Interpolation
Input Sampling Rate
LRCLK/MCLK Ratio
Multibit ∆Σ
Modulator with
Correction
PW M
Conversion
Level
Shifter
Level
Shifter
VA_HPA
HP_A
GND_HPA
DRIVER_A
DR IV E R_ B
VA_HPB
HP_B
GND_HPB
TSTIN
RST
VD
Advance Product Information
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
GND
MCLK
SYNC_CLK
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright Cirrus Logic, Inc. 2001
(All Rights Reserved)
MAY ‘01
DS539PP1
1
1 page  
CS44210
CHARACTERISTICS AND SPECIFICATIONS (Continued)
Parameters
PWM Headphone Output
Full Scale Headphone Output Voltage
Symbol Min
Typ
TBD 0.85 x VA_HP
Headphone Output Quiescent Voltage
Interchannel Gain Mismatch
Modulation Index
Maximum Headphone Output
AC-Current
VA_HPx=2.4V IHP
VA_HPx=5.0V
- 0.5 x VA_HP
- 0.1
--
- 45
- 80
Max
TBD
-
-
85
-
-
Units
Vp
VDC
dB
%
mA
mA
Single Speed Mode Double Speed Mode
Parameter
Symbol Min Typ
Max Min Typ Max Unit
Digital Filter Response (Note 1)
Passband
(Note 2)
to -0.05 dB corner
to -0.1 dB corner
to -3 dB corner
0 - .4535 - - - Fs
--
- 0 - .4426 Fs
0
- .4998 0
- .4984 Fs
Frequency Response 10 Hz to 20 kHz
(Note 3)
-.02 -
+.08 0
- +0.11 dB
StopBand
.5465 -
- .577 -
- Fs
StopBand Attenuation
(Note 4)
50 -
- 55 -
- dB
Group Delay
tgd - 9/Fs - - 4/Fs - s
Passband Group Delay Deviation
0 - 40 kHz
0 - 20 kHz
--
- ±0.36/Fs
-
-
- ±1.39/Fs -
- ±0.23/Fs -
s
s
De-emphasis Error
(Relative to 1 kHz)
Fs = 32 kHz
Fs = 44.1 kHz
Fs = 48 kHz
- - +.2/-.1
- - +.05/-.14
- - +0/-.22
(Note 5)
dB
dB
dB
Note:
1. Filter response is not tested but is guaranteed by design.
2. Response is clock dependent and will scale with Fs. Note that the response plots (Figures 11-18) have
been normalized to Fs and can be de-normalized by multiplying the X-axis scale by Fs.
3. Referenced to a 1 kHz, full-scale sine wave.
4. For Single Speed Mode, the measurement bandwidth is 0.5465 Fs to 3 Fs.
For Double Speed Mode, the measurement bandwidth is 0.577 Fs to 1.4 Fs.
5. De-emphasis is not available in double speed mode.
DS539PP1
5
5 Page 
2. TYPICAL CONNECTION DIAGRAMS
CS44210
2.4 to 5.0 V
Supply
+
100 µF
0.1 µ F
19
VA_HPA
12 TSTIN
20
VA_HPB
2.4 to 5.0 V
Supply
+
1.0 µF
8 VL
0.1 µF
Cout
18 + 100 µH
HP_A
220 µF
0.15
µF
2.4 to 5.0 V
Supply
+
1.0 µF
6 VD
0.1 µF
CS44210
HP_B
Cout
21+
100
µH
220 µF
0.15
µF
Digital
Audio
Source
*
Mode
Control
*
5 MCLK
3 LRCK
4 SC LK
2 SDIN1
1 SDIN2
24 SDIN3
16
DEM
23
RST
15
AD1/CDOUT
9
DIF 0
10 DIF1
DRIVER_A 14
MOSFET
Driver
&
Power
Stage
13
DRIVER_B
MOSFET
Driver
&
Power
Stage
Output
Filter
Output
Filter
SYNC_CLK 11
Sync Clock
GND
17
GND
22
GND
7
16 Ω
Headphones
* This feature is unavailable in this mode.
This pin should be grounded.
Figure 4. Typical CS44210 Connection Diagram Stand-Alone Mode
DS539PP1
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CS44210.PDF ] | |
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