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PDF CDB5014 Data sheet ( Hoja de datos )

Número de pieza CDB5014
Descripción (CDB5012 - CDB5016) Evaluation Board
Fabricantes Cirrus Logic 
Logotipo Cirrus Logic Logotipo



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No Preview Available ! CDB5014 Hoja de datos, Descripción, Manual

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Semiconductor Corporation
CDB5012 CDB5012A
CDB5014 CDB5016
Evaluation Board for CS5012, CS5012A, CS5014,
CS5016 ADC’s
Features
General Description
Compatible with CS5012, CS5012A,
CS5014, CS5016
PC/µP-Compatible Header Connection
16-Bit Parallel Data
End-of-Conversion Output
CS, RD, and A0 Control Inputs
DIP-Switch Selectable:
Unipolar/Bipolar Input Range
Burst & Interleave Calibration Modes
Continuous Conversion
Adjustable Voltage Reference
Serial Data and Clock BNC Connections
Operation from Internally-Generated or
Externally-Supplied Master Clock
The CDB5012/4/6 is an evaluation board that eases the
laboratory characterization of any of the CS5012,
CS5012A, CS5014 and CS5016 A/D converters. The
board can be easily reconfigured to simulate any com-
bination of sampling, master clock, calibration, and input
range conditions.
The converter’s parallel output data are available at a
40 pin strip header allowing easy interfacing to PC’s or
microprocessor busses. Output data is also available in
serial form at SCLK and SDATA coaxial BNC connec-
tors.
Evaluation can also be performed over a wide range of
input spans using the on-board reference circuitry. Fur-
thermore, the CDB5012, CDB5012A, CDB5014,
CDB5016 features DIP-switch selectable unipolar/bipo-
lar input ranges and the interleave calibration mode.
Calibration can be initiated at any time by momentarily
depressing a reset pushbutton.
ORDERING INFORMATION: CDB5012, CDB5012A,
CDB5014, CDB5016
AIN
HOLD
CLKIN
RESET
CS5012
CS5012A
CS5014
CS5016
A/D
Converter
D0 - D15
EOC
A0
RD
CS
SCLK
SDATA
H
E
A
D
E
R
VOLTAGE
REFERENCE
Crystal Semiconductor Corporation
P.O. Box 17847, Austin, TX 78760
(512) 445 7222 FAX: (512) 445 7581
+5V GND -5V
Copyright © Crystal Semiconductor Corporation 1995
(All Rights Reserved)
MAR ’95
DS14DB11
1

1 page




CDB5014 pdf
CDB5012, CDB5012A, CDB5014, CDB5016
terminated by a 51 resistor to eliminate line
reflections of the incoming clock. If the CLKIN
BNC input is left floating, this resistor pulls the
converter’s clock input down to ground, thus ac-
tivating its internal oscillator.
Decoupling
The CDB5012, CDB5012A, CDB5014,
CDB5016’s decoupling scheme was designed to
insure accurate evaluation of the converter’s per-
formance independent of the quality of the power
supplies. Each supply is decoupled at the con-
verter with a 10µF electrolytic capacitor to filter
low frequency noise and a 0.1µF ceramic capaci-
tor to handle higher frequencies. The auto-zero-
ing action of the converter’s comparator provides
extremely good power supply rejection at low
frequencies. Depending on the quality of the sys-
tem’s power supplies, the decoupling scheme
could be relaxed in actual use.
COMPONENT LIST
10 resistor
51 resistor
4.7 resistor
1 kresistor
560 resistor
10 kresistor
2.43 kresistor
3.3 kresistor
240 kresistor
50 kpotentiometer
50 kpotentiometer
0.068 µF capacitor
0.1 µF capacitor
10 µF capacitor
CS501X/511X A/D converter
1403 2.5V reference
OP07 op amp
2N2907A transistor
4 pos. SPST DIP switch
N.O. SPST push-button
20 pin header
bulkhead BNC
red banana jack
black banana jack
green banana jack
1" 4-40 spacer
3/8" 4-40 screw
R1, R2
R3
R18
R9, R14
R17
R4, R5, R6, R7, R8, R10, R11, R12, R13
R19, R20
R16
R21
R15
R22
C14
C1, C3, C5, C7, C9, C10, C12
C2, C4, C6, C8, C11, C13
U1
U2
U3
Q1
SW1
SW2
CON1
CON2, CON3, CON4, CON5, CON6
CON7
CON8
CON9
POST1, POST2, POST3, POST4, POST5, POST6
SC1, SC2, SC3, SC4, SC5, SC6
5 DS14DB11

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