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CDB5366 Schematic ( PDF Datasheet ) - Cirrus Logic

Teilenummer CDB5366
Beschreibung Evaluation Board
Hersteller Cirrus Logic
Logo Cirrus Logic Logo 




Gesamt 24 Seiten
CDB5366 Datasheet, Funktion
www.DataSheet4U.com
CDB5366
Evaluation Board for CS5366
Features
! Single-Ended to Differential Analog Inputs
! 3.3 V Logic Interface
! Connection for DSP Serial I/O
! Windows®-Compatible CDB5366 Software
Supplied by Cirrus to Configure the CS5366
! On-Board CS8406 to Generate S/PDIF and
EIAJ-340 Digital Audio
Description
The CDB5366 evaluation board is an excellent means
for quickly evaluating the CS5366 24-bit, 192 kHz A/D
converter. Evaluation requires only a digital signal ana-
lyzer, an analog signal source, and a power supply.
On-board DIP switches configure the CS5366 in Stand-
Alone mode, avoiding the need for a PC.
For software-based device configuration, the Control
Port mode is used by attaching a host PC to the Evalu-
ation Board and executing the provided FlexGUI
software.
! Requires Only an Analog Signal Source, Power
Supplies and, optionally, a PC for a Complete
Analog-to-Digital-Converter Evaluation System
ORDERING INFORMATION
CDB5366
Evaluation Board
RS232
USB
8051 Micro
Control
I²C or SPI
RCA 6
Jacks
Analog
Input
Buffers
6
6
CS5366 A/D
Ain+
Ain-
Clks/Data
FPGA
S/PDIF
Output
CS8406
AES/EBU
S/PDIF
Transmitter
Optical
Coaxial
Buffers
http://www.cirrus.com
Audio
Clks/Data
Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
SEPTEMBER '05
DS626DB1






CDB5366 Datasheet, Funktion
CDB5366
3.3 FlexGUI Hi-Level View
The Cirrus Logic FlexGUI defaults to the Hi-Level View as shown in Figure 1. This view provides functionally
grouped control over the CS5366, reducing the need to memorize the exact location of bit settings. Any reg-
ister may be modified at any time; however, the effect of changes made to the CS5366 is gated off until the
Control Port Bit is enabled.
When switching to TDM mode, the CS8406 Clock and Date source (Board Control Panel) must be changed
prior to changing the CS5366 SAI format. This sequential ordering resets the FPGA to assure that it timed
properly with the CS5366 TDM packet stream.
Figure 1. Hi-Level FlexGUI View
6 DS626DB1

6 Page









CDB5366 pdf, datenblatt
5. SCHEMATICS
Figure 4. CS5366 (Schematic page 1)

12 Page





SeitenGesamt 24 Seiten
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