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PDF P87LPC778 Data sheet ( Hoja de datos )

Número de pieza P87LPC778
Descripción CMOS single-chip 8-bit 80C51 microcontroller
Fabricantes NXP Semiconductors 
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P87LPC778
CMOS single-chip 8-bit 80C51 microcontroller with
128-byte data RAM, 8 kB OTP
Rev. 01 — 31 March 2004
Product data
1. General description
The P87LPC778 is a 20-pin single-chip microcontroller designed for low pin count
applications demanding high-integration, low cost solutions over a wide range of
performance requirements. A member of the Philips low pin count family, the
P87LPC778 offers a 4 channel, 8-bit A/D converter, programmable oscillator
configurations for high and low speed crystals or RC operation, wide operating
voltage range, programmable port output configurations, selectable Schmitt trigger
inputs, LED drive outputs, and a built-in Watchdog timer. The P87LPC778 is based
on an accelerated 80C51 processor architecture that executes instructions at twice
the rate of standard 80C51 devices.
2. Features
s An accelerated 80C51 CPU provides instruction cycle times of 300 ns to 600 ns
for all instructions except multiply and divide when executing at 20 MHz.
s 2.7 V to 5.5 V operating range for digital functions.
s Four channel, 10-bit Pulse Width Modulator.
s Four channel, 8-bit Analog to Digital Converter. Conversion time is 9.3 µs with a
20 MHz crystal.
s I2C-bus communication port and Full duplex UART.
s Internal oscillator 2.5 %. The internal oscillator option allows operation with no
external oscillator components.
s Two analog comparators.
s Eight keypad interrupt inputs, plus two additional external interrupt inputs.
s Watchdog timer with separate on-chip oscillator, requiring no external
components. The Watchdog time-out time is selectable from 8 values.
s 20-pin TSSOP package.

1 page




P87LPC778 pdf
Philips Semiconductors
5. Pinning information
5.1 Pinning
P87LPC778
CMOS single-chip 8-bit microcontroller
handbook, halfpage
PWM3/CMP2/P0.0 1
PWM2/P1.7 2
PWM1/P1.6 3
RST/P1.5 4
VSS 5
X1/P2.1 6
X2/CLKOUT/P2.0 7
INT1/P1.4 8
SDA/INT0/P1.3 9
SCL/T0/P1.2 10
20 P0.1/CIN2B/PWM0
19 P0.2/CIN2A
18 P0.3/CIN1B/AD0
17 P0.4/CIN1A/AD1
16 P0.5/CMPREF/AD2
15 VDD
14 P0.6/CMP1/AD3
13 P0.7/T1
12 P1.0/TxD
11 P1.1/RxD
002aaa612
Fig 3. 20 pin DIP and SO configuration.
5.2 Pin description
Table 2: Pin description
Symbol
Pin
Type
P0.0 - P0.7 1, 20-16, I/O
14, 13
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
1
20
19
18
17
16
14
O
O
I
O
I
I
I
I
I
I
I
O
I
Description
Port 0: Port 0 is an 8-bit I/O port with a user-configurable output type. Port 0 latches are
configured in the quasi-bidirectional mode and have either ones or zeros written to them
during reset, as determined by the PRHI bit in the UCFG1 configuration byte. The
operation of port 0 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to Section 8.9 “I/O ports” and
Table 67 “DC electrical characteristics” for details.
The Keypad Interrupt feature operates with Port 0 pins.
Port 0 also provides various special functions as described below:
CMP2 — Comparator 2 output.
PWM3 — PWM output 3.
CIN2B — Comparator 2 positive input B.
PWM0 — PWM output 0.
CIN2A — Comparator 2 positive input A.
CIN1B — Comparator 1 positive input B.
AD0 — A/D channel 0 input.
CIN1A — Comparator 1 positive input A.
AD1 — A/D channel 1 input.
CMPREF — Comparator reference (negative) input.
AD2 — A/D channel 2 input.
CMP1 — Comparator 1 output.
AD3 — A/D channel 3 input.
9397 750 12378
Product data
Rev. 01 — 31 March 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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Table 3: Special function registers…continued
* indicates SFRs that are bit addressable.
Name Description
SFR Bit functions and addresses
addr.
Reset
value
MSB
LSB Hex
Bit address D7 D6 D5 D4 D3 D2 D1 D0
PSW* Program status word
D0h CY AC F0 RS1 RS0 OV F1
P 00H
PT0AD Port 0 digital input disable
F6h
00H
Bit address 9F 9E 9D 9C 9B 9A 99 98
SCON* Serial port control
98h SM0 SM1 SM2 REN TB8 RB8
TI
RI 00H
SBUF Serial port data buffer register
99h
xxh
SADDR Serial port address register
A9h
00H
SADEN Serial port address enable
B9h
00H
SP Stack pointer
81h
07h
Bit address 8F 8E 8D 8C 8B 8A 89 88
TCON* Timer0 and 1 control
88h TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 00H
TH0 Timer0 HIGH
8Ch
00H
TH1 Timer1 HIGH
8Dh
00H
TL0 Timer0 LOW
8Ah
00H
TL1 Timer1 LOW
8Bh
00H
TMOD Timer0 and 1 mode
89h GATE
C/T
M1
M0 GATE C/T
M1
M0 00H
WDCON Watchdog control register
A7h -
-
WDOVF WDRUN WDCLK WDS2
WDS1
WDS0 [3]
WDRST Watchdog reset register
A6h
xxh
[1] I/O port values at reset are determined by the PRHI bit in the UCFG1 configuration byte.
[2] The PCON reset value is xxBOF POF - 0000b. The BOF and POF flags are not affected by reset. The POF flag is set by hardware upon power up. The BOF flag is set by the
occurrence of a brownout reset/interrupt and upon power up.
[3] The WDCON reset value is xx11 0000b for a Watchdog reset, xx01 0000b for all other reset causes if the Watchdog is enabled, and xx00 0000b for all other reset causes if the
Watchdog is disabled.

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