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CBTU0808 Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer CBTU0808
Beschreibung Dual lane PCI Express port multiplexer
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 16 Seiten
CBTU0808 Datasheet, Funktion
www.DataSheet4U.com
CBTU0808
Dual lane PCI Express port multiplexer
Rev. 01 — 2 June 2006
Product data sheet
1. General description
The CBTU0808 is a dual lane port multiplexer designed to provide convenient and reliable
path switching for PCI Express signals. It is organized as two PCI Express lanes, each
consisting of a Transmit and Receive channel. Each channel has four ports, two (A and B)
on the source (or host) side and two (A and B) on the destination (or device) side. Each
port provides a pair of signal lines to support PCIe differential signaling.
Using specially designed high-bandwidth and high off-isolation switch elements, source
and destination ports can be connected or isolated in three possible configurations:
source A and B to destinations A and B respectively; or source A to destination B
(remaining ports isolated), or all ports isolated.
The switch elements are controlled by internal control logic to set switch positions in
accordance with these three configurations, selectable by CMOS inputs CTRL0 and
CTRL1 for lanes 0 and 1 respectively. Within a lane, the switch configuration is always
applied identically to both transmit and receive channels.
The CBTU0808 is packaged in a 48-ball, depopulated 9 × 9 grid, 0.5 mm ball pitch, thin
profile fine-pitch ball grid array (TFBGA) package, which (while requiring a minimum
5 mm × 5 mm of board space) allows for adequate signal routing and escape using
conventional board technology.
2. Features
I 2-lane wide PCI Express port multiplexer
I One transmit and one receive differential channel per lane
I Four ports per channel
I PCI Express signaling compliant
I High bandwidth: > 1 GHz
I Low OFF-feedthrough of < 35 dB at 1.25 GHz
I Low channel crosstalk of < 35 dB at 1.25 GHz
I Designed to match characteristic impedance of PCIe signaling environment
I Single 1.8 V supply operation
I ESD resilience of 2 kV HBM
I Available in 48-ball, 5 mm × 5 mm, 0.5 mm ball pitch TFBGA package, Pb-free/Green
3. Applications
I High-performance computing applications
I Port switching and docking applications






CBTU0808 Datasheet, Funktion
Philips Semiconductors
CBTU0808
Dual lane PCI Express port multiplexer
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
VDD
VI
IIK
IOK
IO
ICCC
Tstg
Vesd
supply voltage
input voltage
input clamping current
output clamping current
output current
continuous current through each
VDD or GND pin
storage temperature
electrostatic discharge voltage
VI < 0 V or VI > VDD
VO < 0 V or VO > VDD
continuous; 0 V < VO < VDD
Human Body Model; 1.5 k; 100 pF
Machine Model; 0 ; 200 pF
Min
0.5
[1] 0.5
-
-
-
-
65
>2
>200
Max
+2.5
+2.5
50
±50
±50
±100
+150
-
-
[1] The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
9. Recommended operating conditions
Unit
V
V
mA
mA
mA
mA
°C
kV
V
Table 5.
Symbol
VDD
VI
VIH
VIL
VICR
VI(dif)(p-p)
Tamb
Recommended operating conditions
Parameter
Conditions
supply voltage
input voltage
TXn and RXn ports
HIGH-level input voltage
CTRL[1:0], TEST inputs
LOW-level input voltage
CTRL[1:0], TEST[1:0] inputs
common mode input voltage TXn and RXn ports
range
peak-to-peak differential
input voltage
TXn and RXn ports
ambient temperature
operating in free air
Min
1.7
0.25
[1] 0.65 × VDD
[1] -
0
Typ
-
-
-
-
-
[2] -
-
0-
Max
1.9
+1.75
VDD
0.35 × VDD
1.5
1.2
+85
[1] The CTRL[1:0] inputs of the device must be held at valid levels (not floating) to ensure proper device operation.
[2] VI(dif)(p-p) = 2 × |VTX_D+ VTX_D|. See Paragraph 4.3.3, Table 4-5 of Ref. 1.
Unit
V
V
V
V
V
V
°C
CBTU0808_1
Product data sheet
Rev. 01 — 2 June 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
6 of 16

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CBTU0808 pdf, datenblatt
Philips Semiconductors
CBTU0808
Dual lane PCI Express port multiplexer
14. Soldering
14.1 Introduction to soldering surface mount packages
There is no soldering method that is ideal for all surface mount IC packages. Wave
soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is recommended.
14.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and
binding agent) to be applied to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement. Driven by legislation and
environmental forces the worldwide use of lead-free solder pastes is increasing.
Several methods exist for reflowing; for example, convection or convection/infrared
heating in a conveyor type oven. Throughput times (preheating, soldering and cooling)
vary between 100 seconds and 200 seconds depending on heating method.
Typical reflow temperatures range from 215 °C to 260 °C depending on solder paste
material. The peak top-surface temperature of the packages should be kept below:
Table 8. SnPb eutectic process - package peak reflow temperatures (from J-STD-020C
July 2004)
Package thickness
Volume mm3 < 350
Volume mm3 350
< 2.5 mm
240 °C + 0/5 °C
225 °C + 0/5 °C
2.5 mm
225 °C + 0/5 °C
225 °C + 0/5 °C
Table 9. Pb-free process - package peak reflow temperatures (from J-STD-020C July
2004)
Package thickness
Volume mm3 < 350
Volume mm3 350 to Volume mm3 > 2000
2 000
< 1.6 mm
260 °C + 0 °C
260 °C + 0 °C
260 °C + 0 °C
1.6 mm to 2.5 mm
260 °C + 0 °C
250 °C + 0 °C
245 °C + 0 °C
2.5 mm
250 °C + 0 °C
245 °C + 0 °C
245 °C + 0 °C
Moisture sensitivity precautions, as indicated on packing, must be respected at all times.
14.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices
(SMDs) or printed-circuit boards with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering method was specifically
developed.
If wave soldering is used the following conditions must be observed for optimal results:
Use a double-wave soldering method comprising a turbulent wave with high upward
pressure followed by a smooth laminar wave.
For packages with leads on two sides and a pitch (e):
CBTU0808_1
Product data sheet
Rev. 01 — 2 June 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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