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Número de pieza | NTD4810NH | |
Descripción | Power MOSFET ( Transistor ) | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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NTD4810NH
Power MOSFET
30 V, 54 A, Single N−Channel, DPAK/IPAK
Features
• Low RDS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• Low RG
• These are Pb−Free Devices
Applications
• CPU Power Delivery
• DC−DC Converters
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value
Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current (RqJA) (Note 1)
Power Dissipation
(RqJA) (Note 1)
Continuous Drain
Current (RqJA) (Note 2)
Power Dissipation
(RqJA) (Note 2)
Continuous Drain
Current (RqJC)
(Note 1)
Steady
State
TA = 25°C
TA = 85°C
TA = 25°C
TA = 25°C
TA = 85°C
TA = 25°C
TC = 25°C
TC = 85°C
VDSS
VGS
ID
PD
ID
PD
ID
30
"20
10.8
8.4
2.0
8.6
6.7
1.28
54
42
V
V
A
W
A
W
A
Power Dissipation
(RqJC) (Note 1)
TC = 25°C
Pulsed Drain Current tp=10ms TA = 25°C
Current Limited by Package
TA = 25°C
Operating Junction and Storage Temperature
PD
IDM
IDmaxPkg
TJ, Tstg
50
120
45
−55 to
175
W
A
A
°C
Source Current (Body Diode)
Drain to Source dV/dt
IS
dV/dt
41 A
6.0 V/ns
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 24 V, VGS = 10 V,
L = 0.3 mH, IL(pk) = 21 A, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
EAS 66 mJ
TL 260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
http://onsemi.com
V(BR)DSS
30 V
RDS(on) MAX
10 mW @ 10 V
16.7 mW @ 4.5 V
D
ID MAX
54 A
N−Channel
G
S
4
4
4
12
3
DPAK
CASE 369C
(Bent Lead)
STYLE 2
1 23
1
2
3
3 IPAK
IPAK
CASE 369AC CASE 369D
(Straight Lead) (Straight Lead
DPAK)
4
Drain
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4
Drain
2
1 Drain 3
Gate Source
1 23
Gate Drain Source
1
23
Gate Drain Source
Y = Year
WW = Work Week
4810NH = Device Code
G = Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
December, 2006 − Rev. 0
1
Publication Order Number:
NTD4810NH/D
1 page NTD4810NH
TYPICAL PERFORMANCE CURVES
2000
1750
VDS = 0 V VGS = 0 V
1500 Ciss
TJ = 25°C
15
TJ = 25°C
12
QT
20
16
1250
Ciss
9
VDS
VGS
12
1000
750 Crss
500
250
0
15
10
Coss
Crss
505
VGS
VDS
10 15
20 25 30
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
6
Q1
3
Q2
8
4
00
0 2 4 6 8 10 12 14 16 18 20 22 24
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage vs. Total Charge
1000
VDD = 15 V
ID = 30 A
VGS = 11.5 V
100
30
VGS = 0 V
25 TJ = 25°C
20
tr
td(off)
10
tf
td(on)
1
1 10 100
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
15
10
5
0
0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage vs. Current
1000
100
10 ms
10
1
0.1
0.1
100 ms
VGS = 20 V
SINGLE PULSE
TC = 25°C
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1 ms
10 ms
dc
1 10 100
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
70
ID = 21 A
60
50
40
30
20
10
0
25 50 75 100 125 150 175
TJ, JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
http://onsemi.com
5
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet NTD4810NH.PDF ] |
Número de pieza | Descripción | Fabricantes |
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